i am finding Short between VCC and GND pins of EP1K100 ACEX Series IC. What could be the reason other than ESD on I/Os which could lead to this .. any idea..?

I tkae it that you did not intend to open a new thread, but wanted to answer yesterday's thread?

Anyway, once the chip is showing this kind of damage, it's dead for good, not way to re-vive it. Did you check the design for use of 5V signals that possibly drive into clamping diodes that you may have switched on by accident?

Jens

Hi Jens,

Thank you for the answer..

You are correct..that I was trying for premier support...so posted it again by mistake..​

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And Yes I have checked design for 5V tolerent ​ standard and it is designed for 3.3V standard.

And if I am not wrong, if this is due to quartus design issue then problem should be consistent rt...?

Sorry forgot to mention in post...FYI..it is happening ​only in around 10% of boards i.e 8/80 boards..

If this is only happening on a few boards, then you're probably looking for a different cause. The defect you're describing may be a latch-up, which means that both the push and the pull driver of the CMOS output are driven at the same time, shorting out the IO voltage to GND.

I have hardly ever seen this on an FPGA. but I've seen it many times on CPLDs, ever since the AMD MACH series. The most likely cause for a latch-up on CPLDs is power spikes and drops. Check voltage ripple and step response on your regulators. You can always improve step response with a larger cap and lower ESR, but with multiple voltages involved on an FPGA board, you may need to go into deeper analysis for possible cross-regulation problems.