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Altera_Forum's avatar
Altera_Forum
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13 years ago

How to export Nios2 signals?

Hi,

i have designed a custom multiprocessor interconnect (a switch fabric) for my bachelor thesis. One requirement was that it can handle different processor types (load/store architecture). Maybe you need a wrapper for the signals so the output port of the processor fit to the input port of the interconnect, but that's not the point.

Now i want to test it with the Nios II. So i created a Qsys system with an on-chip memory for the instructions (so i can download the elf file via the jtag module), a jtag uart component (so i can write to a terminal for better testing), the interval timer and a system ID peripheral.

My question is:

Which would be the best way to export the nios2 signals (address, read, write etc.), so i can use them for my own interconnect?

Or is it possible to use the nios2 without Qsys an instantiate directly in Quartus? (which would be generally also fine to know, because finally all accesses should use my custom interconnect)

Thanks for your help and regards,

Thomas

p.s.: my english is not the best. so sorry for mistakes and misunderstandings (hopefully not) :-)

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    To export signals out of QSYS you've to select the row of the respective interface and click the *conduit* column.

    Doing that, you've created a conduit.

    A conduit is an interface that is routed directly to the outside of the QSYS system.

    But if you export the interface of the NIOS (if it's possible in the first place) how do you connect the JTAG-UART?

    Maybe you'll export his interfaces too and connect all the conduits to your switch fabric.

    At this point you'll have to deal outside of QSYS with the avalon interfaces (NIOS, JTAG-UART) to glue them to your

    switch fabric.

    Does that fits your needs?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi,

    did you mean the export column? I found this already, but I thought there would be a nicer way without Qsys (like MegaWizard). However I think this could work and I would try this out.

    But at the beginning I would like use the possibility load the .efl file via jtag, cause I can't except that my interconnect is totally bug free (that's what i want to figure out :-) ). When I export the data_master from the nios I can't connect it to other devices and I think I have connected it to the instruction memory. Otherwise I can't use the download software via jtag option (I try this but it doesn't work... I have the assumption that the the software would load with the help of the nios self over the data_master in the instruction memory. Am I right?).

    So is there another way to export the signals? I try the Avalon MM Slave Translator and export the avalon_anti_slave, but for some reasons I get an error when i try to load the software in the instruction memory. I have exported the address, byteenable, read, readdata, write, writedata, waitrequest, burstcount and readdatavalid signals (like the signals from data_master port of the nios). When I omit the burstcount, waitrequest and readdatavalid signal it works... I don't know why. (I want do figure out which of these signals is the real problem... maybe its only one of them).

    Is there maybe a better component to export the signals out of the Qsys system?

    Thanks and regards

    Thomas