Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi,
did you mean the export column? I found this already, but I thought there would be a nicer way without Qsys (like MegaWizard). However I think this could work and I would try this out. But at the beginning I would like use the possibility load the .efl file via jtag, cause I can't except that my interconnect is totally bug free (that's what i want to figure out :-) ). When I export the data_master from the nios I can't connect it to other devices and I think I have connected it to the instruction memory. Otherwise I can't use the download software via jtag option (I try this but it doesn't work... I have the assumption that the the software would load with the help of the nios self over the data_master in the instruction memory. Am I right?). So is there another way to export the signals? I try the Avalon MM Slave Translator and export the avalon_anti_slave, but for some reasons I get an error when i try to load the software in the instruction memory. I have exported the address, byteenable, read, readdata, write, writedata, waitrequest, burstcount and readdatavalid signals (like the signals from data_master port of the nios). When I omit the burstcount, waitrequest and readdatavalid signal it works... I don't know why. (I want do figure out which of these signals is the real problem... maybe its only one of them). Is there maybe a better component to export the signals out of the Qsys system? Thanks and regards Thomas