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Altera_Forum's avatar
Altera_Forum
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11 years ago

How to access FPGA Manager's Input & Output ?

I am using Cyclone V SoC Dev Kit.

I want to write a bare-metal program to access PUSH_BUTTON & DIP SWITCH on the board.

I check the schematic of EVK, BUTTON & DIPSW is connect to FPGA manager's Input port.

I have write a code as below, but can't read the input data from FPGA manager. How to make it available to access FPGA manager's Input ?

----------- Bare-metal source code -------------

// Download SOF before running program !!!

int main(int argc, char** argv)

{

ALT_STATUS_CODE status = ALT_E_SUCCESS;

ALT_FPGA_CFG_MODE_t mode;

status = alt_fpga_init();

if(status != ALT_E_SUCCESS)

return 1;

if (alt_fpga_state_get() != ALT_FPGA_STATE_USER_MODE)

{

printf("\n not in USER_MODE. \n");

return 1;

}

status = alt_fpga_control_enable();

if(status != ALT_E_SUCCESS)

return 1;

while(1)

{

uint32_t input = alt_fpga_gpi_read(0xFFFFFFFF);

printf(" input = 0x%X. \n", input);

}

return 0;

}

-------------- result ---------

intput val = 0xFFFFFFFF

intput val = 0xFFFFFFFF

intput val = 0xFFFFFFFF

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Are you sure that in FPGA loaded .rbf or .sof with configuration, making routing to HPS of external pins ?

    And similar program with HPS buttons work correctly ?
  • Altera_Forum's avatar
    Altera_Forum
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    That's the point. I am not should that FPGA manager's input can directly connect to external pin.

    What's the correct usage of FPGA input / output pins ?
  • Altera_Forum's avatar
    Altera_Forum
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    I is the programmer, in principle circuit don't know !

    May be method to insert your code in HWLIB-example, where LEDs was blinked -- there buttons MUST be available!

    And then cut small portions of big code, try compile and run -- while buttons may work, else undo cutting, cut another lines... In that way you get minimal program and understand, what current is bad. While not finded good documentation :)

    P.S. Try .svd files in debugger, as described in ug_soc_eds.pdf -- your code not need, and all GPIO may be visible after init.
  • Altera_Forum's avatar
    Altera_Forum
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    Have you tried running that code with your finger on the button? Often board designs make push buttons active low so if you read 0xFFFF_FFFF when nothing is pushed and something like say 0xFFFF_FFFE when you push button 0 then it's behaving as I would expect with active low buttons.

    Last but not least are you 100% sure those buttons and LEDs are connected to the FPGA manager GPIO and not just HPS GPIO? If the buttons/LEDs connect to FPGA I/O and are wired up to the HPS through the HPS Qsys component then yes, that's the FPGA manager GPIO you are using. If those buttons/LEDs connect to HPS I/O then you want to access the appropriate HPS GPIO component registers.
  • Altera_Forum's avatar
    Altera_Forum
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    The Board has

    1) 4 DIPSW for FPGA, 4 for HPS,

    2) 4 PUSH_BUTTON for FPGA, and 2 PUSH_BUTTON for HPS

    3) 4 LED for FPGA , 4 LED for HPS

    The PUSH_BUTTON or LED or DIPSW connect to FPGA can access via LW_AXI_BRIDGE.

    The LED of HPS is connect to GPIO 41~44, can access with GPIO registers of HPS.

    I am sure the PushButton & DipSwitch is connect to HPS's PIN according to Cyclone V SoC Dev Kit (Rev.C) schematic. You can find in www.rocketboards.org (http://www.rocketboards.org). http://www.rocketboards.org/pub/documentation/alterasocdevelopmentboard/c5_soc_devkit_c.pdf?t=1365712679

    - search keyword "USER_PB_HPS", on page 5

    Is there any example source code to access FPGA Manager 's GPIO ?

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9117
  • Altera_Forum's avatar
    Altera_Forum
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    I am totally wrong.

    The PUSH_BUTTON & DIPSW is connect to GPIO2 (Input Only PINs), not FPGA manager .

    Sorry for bothering everyone.