[HELP]question about loading different sof+elf files in remote upgrade

Make sure your MSEL pins are set correctly. I remember this being a problem in the Stratix II.

Jake

Thank you Jake. They (MSEL) are set to 010 (AS 3.3V). What I find confusing is the ALTREMOTE_UPDATE document (Ch 3 - table 3-3) lists Remote Update params and available bits in each param, while the Cyclone III Device Handbook Vol 1 (Ch 9 - table 9-27) shows the Remote update status in one 32-bit register. And then there's the ug_remoteupdate PDF with more information. Following all the scattered documentation has made this more difficult.

I do know the application configuration is loaded when the configuration is started and the bootstrap loads the factory NIOS II software. It is when the factory software runs that I want to check if it's in application mode and then in the NIOS II software load the EPCS data to RAM (upper) and copy this to lower RAM to run. I figured when I knew I could do this, then I'd move this logic to a custom boot copier.

Thank you,

Bill

Hi,

I am writting here because I am trying to find a way to program my .sof file and my .elf file on my EPCS but I do not know how to do this. I have tried with Flash Programmer but I have always the same error:

Programmed 200KB +56KB in 4.6s (55.6KB/s)

Did not attempt to verify device contents

Leaving target processor paused

I have also tried to program on my Flash but I do not know how to find the offset (in Flash Programmer) so everytime the Programmatin failed! Could someone help me please it is very very important!

--- Quote Start ---

Programmed 200KB +56KB in 4.6s (55.6KB/s)

Did not attempt to verify device contents

Leaving target processor paused

--- Quote End ---

This is not an error. This is exactly what you should see. With an EPCS device, the flash programmer programs the data but does not read it back for verification simply because it takes so long. It appears to be working just fine.

Jake

Thank you Jake!

I am sorry, I have another question because I am a newbie! Now I try with the CFI Flash (I have a DE development board), but I have this error:

Program failed at offset 146C6

Leaving target processor paused

I do not know how to find the offset! In SOPC Builder, my CFI Flash is at the address 0x01400000 (it is put automatically here). What should I do?

Thanks again, it is so nice to see a whole community of people helping each other!

éléa

Can you provide the full console printout from the flash programmer? This will tell us what base address the programmer is trying to program the flash at. My first guess is simply that your CFI flash is not connected properly.

Jake

To connect my CFI Flash I used a tri-state-bridge and the CFI component provided by Altera. I am working on a DE1 development board, can it be the problem? Should I use another component? I made the test of my memory with the template test memories provided also by Altera and then found my CFI Flash. Here is the screen I obtained:

#!/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.#

cd D:/Test_memoires/essai/Debug

# Creating .flash file for the FPGA configuration

"$SOPC_KIT_NIOS2/bin/sof2flash" --offset=0x0 --input="D:/Test_memoires/carte.sof

" --output="carte.flash"

Info: *******************************************************************

Info: Running Quartus II Convert_programming_file

Info: Command: quartus_cpf --no_banner --convert D:/Test_memoires/carte.sof cart

e.rbf

Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings

Info: Peak virtual memory: 58 megabytes

Info: Processing ended: Fri Aug 07 08:22:08 2009

Info: Elapsed time: 00:00:03

Info: Total CPU time (on all processors): 00:00:03

# Programming flash with the FPGA configuration

"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x00000000 --sidp=0x00505128

--id=1155318747 --timestamp=1249570787 --instance=0 "carte.flash"

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

Reading System ID at address 0x00505128: verified

: Checksumming existing contents

00000000 : Verifying existing contents

00002000 : Verifying existing contents

00004000 : Verifying existing contents

00006000 : Verifying existing contents

00008000 : Verifying existing contents

0000A000 : Verifying existing contents

0000C000 : Verifying existing contents

0000E000 : Verifying existing contents

00000000 : Reading existing contents

00010000 : Reading existing contents

00020000 : Reading existing contents

00030000 : Reading existing contents

00040000 : Reading existing contents

00050000 : Reading existing contents

00060000 : Reading existing contents

00070000 : Reading existing contents

Checksummed/read 101kB in 3.0s

00000000 ( 0%): Erasing

00010000 ( 1%): Erasing

00020000 (15%): Erasing

00030000 (29%): Erasing

00040000 (43%): Erasing

00050000 (57%): Erasing

00060000 (71%): Erasing

00070000 (85%): Erasing

Erased 456kB in 3.8s (120.0kB/s)

00000000 ( 0%): Programming

00002000 ( 1%): Programming

00004000 ( 1%): Programming

00006000 ( 1%): Programming

00008000 ( 1%): Programming

0000A000 ( 1%): Programming

0000C000 ( 1%): Programming

0000E000 ( 1%): Programming

00010000 ( 1%): Programming

Program failed at offset 1431C

Leaving target processor paused

# Creating .flash file for the project

"$SOPC_KIT_NIOS2/bin/elf2flash" --base=0x00000000 --end=0x3fffff --reset=0x50400

0 --input="essai.elf" --output="ext_flash.flash" --boot="C:/altera/90/ip/altera/

nios2_ip/altera_nios2/boot_loader_cfi.srec"

# Programming flash with the project

"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --base=0x00000000 --sidp=0x00505128

--id=1155318747 --timestamp=1249570787 --instance=0 "ext_flash.flash"

Empty flash content cannot be programmed or verified

# Creating .flash file for the project

"$SOPC_KIT_NIOS2/bin/elf2flash" --epcs --input="essai.elf" --output="epcs_contro

ller.flash"

# Programming flash with the project

"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --epcs --base=0x00504000 --sidp=0x0

0505128 --id=1155318747 --timestamp=1249570787 --instance=0 "epcs_controller.fla

sh"

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

Reading System ID at address 0x00505128: verified

: Checksumming existing contents

00000000 : Verifying existing contents

00000000 : Reading existing contents

Checksummed/read 30kB in 0.7s

00000000 ( 0%): Erasing

Erased 64kB in 0.9s (71.1kB/s)

00000000 ( 0%): Programming

Programmed 35KB +29KB in 1.5s (42.6KB/s)

Did not attempt to verify device contents

Leaving target processor paused

Thanks for your help

--- Quote Start ---

avtx30, did you get this going? I'm having trouble reconfiguring and knowing in that load that I'm not in factory mode. Param 0 is always reading 0, not 1 after a reconfigure. Are you having any better luck than I am?

Bill

--- Quote End ---

Hi Bill,

I could read 1 after a reconfigure. The app. note no.521 was a good one, did you try it?

--- Quote Start ---

1 - You can use the remote update core to trigger a reconfiguration.

2 - What I do for production ...

. a - Install the Quartus II standalone programmer on the production PC.

. b - Copy the following files from your development PC and package them with your programming files...

. nios2-flash-programmer.exe

. cygwin1.dll

. jtag_atlantic.dll

This should be all you need to run the nios2 flash programmer on the production PC. It's a whole lot faster than using the jtag indirect method with the quartus II programmer.

Jake

--- Quote End ---

Hi, Jake

Could you please describe how to use the remote update core to trigger a reconfiguration in detail? I mean that the remote update core is included in factory image. Therefore, how does the software of application image access the remote update core, since the application image is independent with factory image?

Thank you in advance

-wei