Forum Discussion
Hi,
For the uart, we have only uart ip but don't have verilog code design example.
I think you can choose an open source uart verilog code to start with.
For example, I had tested the uart verilog code from this link https://github.com/ben-marshall/uart/tree/master with our uart design example link https://www.intel.com/content/www/us/en/design-example/715139/cyclone-v-fpga-uart-rs-232-maximum-baud-rate-reference-design.html
I had used MAX 10 and replaced the second uart uart_1 with the open source uart verilog code and it works well. Based on the CV_SOC_UART_project\software\software\UART_RXTX\main.c, I had sent data 100, 25, 5, 6 from uart_0 to open source uart verilog code. Open source uart received correctly. Check attached file and screenshot.
I don't have MAX II with me but I think open source uart verilog code should work in MAX II as well.
Thanks,
Regards,
Sheng
- Thiru_N4 months ago
New Contributor
Hi, @ShengN_Intel .
I attempted to open the CV_SOC_UART_project using Quartus Prime Standard Edition 18.0. I selected the uart.qpf project file and changed the target device to MAX II EPM240T100C5N. However, when I tried to compile the project, I encountered the following error:
Error (12252): Uart.OCRAM: Selected device family does not support this module.
I also tried to change the device family, but it still lists the MAX II device. Why is this happening? How can I implement UART functionality on the MAX II series?
Is there an alternative method for UART communication on MAX II devices, or is the MAX II no longer supported for such functionality?
I would really appreciate your guidance. Looking forward to your positive response.