Forum Discussion

Thiru_N's avatar
Thiru_N
Icon for New Contributor rankNew Contributor
8 months ago

Help Needed: Implementing UART and SPI on Altera MAX II EPM240 CPLD

Hi everyone, I'm currently working with the Altera MAX II EPM240T100C5N CPLD and I'm trying to implement UART and SPI communication protocols on it. I'm using Verilog HDL and targeting a 3.3V logic ...
Programmable Logic Device
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
8 months ago

Hi,


For SPI master, you may check this design example https://www.intel.com/content/www/us/en/docs/programmable/683277/current/serial-peripheral-interface-master-in.html

This application note details the implementation of the SPI master in MAX II, MAX V and MAX 10 devices.

Design link: https://www.intel.com/content/www/us/en/design-example/715016/intel-max-10-fpga-an-485-serial-peripheral-interface-master-design-example.html


Will provide the UART part later.


Thanks,

Regards,

Sheng