Forum Discussion
Hello, im trying to simulate a module which has a pll,but i keep getting this error vsim-3033
This is the error message in modelsim
** Error: (vsim-3033) D:/altera askhseis/lora_test6/my_test_pll.v(72): Instantiation of 'altpll' failed. The design unit was not found.
# Time: 0 ps Iteration: 0 Instance: /topModule/my_test_pll_inst File: D:/altera askhseis/lora_test6/my_test_pll.v
# Searched libraries:
# D:/altera askhseis/lora_test6/simulation/modelsim/rtl_wor
I read something about some libraries missing but had no success. To be more specific i tried adding this libraby altera_lnsim_ver with this command vsim -L < library name > and got this message no design specified.
I could really use some help! Thanks you!
I see that you got the libraries, but you have to tell the tool where the ALTPLL library is, when you start the simulation. You command could look like:
vsim -L altera_mf_ver work.<top_module>
Regards.
6 Replies
- Ash_R_Altera
Regular Contributor
I see that you got the libraries, but you have to tell the tool where the ALTPLL library is, when you start the simulation. You command could look like:
vsim -L altera_mf_ver work.<top_module>
Regards.
- antonto
Occasional Contributor
Thank you very much!!! It worked!!!
- Ash_R_Altera
Regular Contributor
Sorry, I meant ALTPLL 'component', not library.
- sstrell
Super Contributor
I'm not sure if this is the issue or related to the issue, but you should not have any spaces in a path.
- Ash_R_Altera
Regular Contributor
Hi,
ALTPLL component can be found in altera_mf and altera_mf_ver libraries. Please include either of them based on the hdl language of the IP RTL files, using the -L option of vsim command.
As @sstrell mentioned, it is not advisable to keep spaces in the path.
Regards
- antonto
Occasional Contributor
Hi again, sorry im still learning but i think i got those libraries as u can see in the picture below
@sstrell And about the spaces in the path you mean this _? I tried without them but same result again! Sorry if the questions are silly! Thanks a lot!!
** Error: (vsim-3033) D:/altera askhseis/loratest8/mytestpll.v(72): Instantiation of 'altpll' failed. The design unit was not found.
# Time: 0 ps Iteration: 0 Instance: /topModule/mytestpll_inst File: D:/altera askhseis/loratest8/mytestpll.v
# Searched libraries:
# D:/altera askhseis/loratest8/simulation/modelsim/rtl_work