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antonto's avatar
antonto
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Hello, im trying to simulate a module which has a pll,but i keep getting this error vsim-3033

This is the error message in modelsim ** Error: (vsim-3033) D:/altera askhseis/lora_test6/my_test_pll.v(72): Instantiation of 'altpll' failed. The design unit was not found. # Time: 0 ps Iteratio...
  • Ash_R_Intel's avatar
    Ash_R_Intel
    4 years ago

    I see that you got the libraries, but you have to tell the tool where the ALTPLL library is, when you start the simulation. You command could look like:

    vsim -L altera_mf_ver work.<top_module>


    Regards.


Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,

ALTPLL component can be found in altera_mf and altera_mf_ver libraries. Please include either of them based on the hdl language of the IP RTL files, using the -L option of vsim command.

As @sstrell mentioned, it is not advisable to keep spaces in the path.


Regards


  • antonto's avatar
    antonto
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago

    Hi again, sorry im still learning but i think i got those libraries as u can see in the picture below

    @sstrell And about the spaces in the path you mean this _? I tried without them but same result again! Sorry if the questions are silly! Thanks a lot!!

    ** Error: (vsim-3033) D:/altera askhseis/loratest8/mytestpll.v(72): Instantiation of 'altpll' failed. The design unit was not found.
    # Time: 0 ps Iteration: 0 Instance: /topModule/mytestpll_inst File: D:/altera askhseis/loratest8/mytestpll.v
    # Searched libraries:
    # D:/altera askhseis/loratest8/simulation/modelsim/rtl_work