Hello, I have configured in QSYS f2h_sdram0 as Avalon-MM Bidirectional with a width of 64 bits. Whatever I connect to this interface, blocks the HPS when I run "run bridge_enable_handoff" in the uboot console. ( Tried the SGDMA which freezes instantly, the NIOS II core which freezes upon a RAM access... ) Preloader and uboot are of course regenerated each time I change the design. What can be the reason of this behaviour? Misconfiguration of pin assignments to the RAM in Quartus? But Linux seems to work on the HPS. Thanks Hannes Edit: With security enabled at least no freeze with the SGDMA. Edit2: If I forgot to mention something important, please tell me. When frozen, everything on the f2h_sdram0 is set to 0 (data address, data_burstcount, data_byteenable, data_writedata, data_readdata) Is this important? Is there anything I can test using Signaltap?

Has nobody any idea where I could start looking for the error? If you are lacking information, tell me ;)

I have a similar problem. The ARM freezes not after enabling the bridges but at the first read access from the FPGA side to the SDRAM. After a cold reset all works fine and no freezes are seen. That happens only after a power-up. Philipp

How have you made the waitrequest of the SDRAM interface falls to 0. I added an SDRAM interface on HPS for the FPGA, but the waitrequest stays at 1. Is anybody can help me ? Thanks in advance.

I just solved a similar issue. Try burning the sof file first before booting Linux. Once the FPGA is configured, press the WARM reset button to boot Linux. The preloader should automatically configure all the required HPS registers on bootup. From my experience, you cannot properly configure the HPS SDRAM controller registers while Linux is running. This has to be done by the preloader on bootup. Hope this helps!

--- Quote Start --- I just solved a similar issue. Try burning the sof file first before booting Linux. Once the FPGA is configured, press the WARM reset button to boot Linux. The preloader should automatically configure all the required HPS registers on bootup. From my experience, you cannot properly configure the HPS SDRAM controller registers while Linux is running. This has to be done by the preloader on bootup. Hope this helps! --- Quote End --- Indeed, if the .sof is loaded before booting linux, that works fine. Is someone got a solution to avoid rebooting linux each time you what to try some codes? And why we need to do that? preloader & uboot aren't here to manage intelligente booting?? Nico

FPGA-to-HPS SDRAM Interface blocks whole HPS

12 Replies

Altera_Forum
Honored Contributor
11 years ago
Has nobody any idea where I could start looking for the error?
If you are lacking information, tell me ;)
Altera_Forum
Honored Contributor
11 years ago
I have a similar problem. The ARM freezes not after enabling the bridges but at the first read access from the FPGA side to the SDRAM. After a cold reset all works fine and no freezes are seen. That happens only after a power-up.

Philipp
Altera_Forum
Honored Contributor
11 years ago
How have you made the waitrequest of the SDRAM interface falls to 0.
I added an SDRAM interface on HPS for the FPGA, but the waitrequest stays at 1.

Is anybody can help me ?
Thanks in advance.
Altera_Forum
Honored Contributor
11 years ago
I just solved a similar issue. Try burning the sof file first before booting Linux. Once the FPGA is configured, press the WARM reset button to boot Linux. The preloader should automatically configure all the required HPS registers on bootup. From my experience, you cannot properly configure the HPS SDRAM controller registers while Linux is running. This has to be done by the preloader on bootup.

Hope this helps!
Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---
I just solved a similar issue. Try burning the sof file first before booting Linux. Once the FPGA is configured, press the WARM reset button to boot Linux. The preloader should automatically configure all the required HPS registers on bootup. From my experience, you cannot properly configure the HPS SDRAM controller registers while Linux is running. This has to be done by the preloader on bootup.

Hope this helps!
--- Quote End ---

Indeed, if the .sof is loaded before booting linux, that works fine.
Is someone got a solution to avoid rebooting linux each time you what to try some codes?

And why we need to do that? preloader & uboot aren't here to manage intelligente booting??

Nico
Altera_Forum
Honored Contributor
11 years ago
If you let the ARM automatically configure the FPGA during boot, then you don't need to do the above steps! But I don't understand why this is so.
Altera_Forum
Honored Contributor
11 years ago
Well, when i let booting the arm first, then i program fpga frabric i cant read/write data to DDR3. :/
Altera_Forum
Honored Contributor
11 years ago
Oh, that's not what I meant. If you automatically configure the FPGA via u-boot: (http://www.rocketboards.org/foswiki/documentation/gsrd131programmingfpga#fpga_configuration_from_u_45boot) , you would not need to do the warm HPS reset step! :)
Altera_Forum
Honored Contributor
11 years ago
Okok, thanks for the hint. I'll try this :).
Altera_Forum
Honored Contributor
11 years ago
No problem! Works like a charm for me!! :)

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FPGA-to-HPS SDRAM Interface blocks whole HPS

12 Replies

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