Flash Loader IP not loaded on device 1

Hello

As I wrote I did performed reduction of the operating frequency to 16Mhz but even with this frequency USB blaster II working much slower than Terasic USB blaster running on 6Mhz. This cause us difficulties using USB blaster II in mass production (and we don't have enough Terasic USB blasters).

Anyway, I am not sure that the issue is a signal integrity (unless it is inside FPGA). This is because JTAG path running on 24Mhz configuring SOF file without problem.

And the path between FPGA and flash running on 40Mhz configuring FPGA smoothly.

Maybe the problem is with SFL IP that can't run on 24Mhz??

What do you think?

Thank you

Alex

Hello

JTAG connector is not connected directly to the flash, it is connected to FPGA only and serial flash loader is used to program the flash.

The connection is done according to a following schematics:

As I wrote also FPGA configuration from the flash running in 40Mhz is done correctly.

All nets between JTAG - FPGA and FPGA - flash are handled very carefully and matched in length with reference to TCK/DCLK.

So personally, I suspect that the problem is with SFL IP (it can't work in 24Mhz or not initialized and etc...)??

Also, why USB blaster II running on 16Mhz is much slower than Terasic running on 6Mhz?

Thank you

Alex

Hello Aiman

1. Programming same jic file with:

USB blaster II running on 16Mhz (after I run: jtagconfig --setparam 1 JtagClock 16M) - 3 minutes 39 seconds.

Terasic USB blaster (running on default speed, should be 6Mhz) - 56 seconds.

2. Don't have another Altera USB blaster II for compare.

3.

Micron flash is not assembled.

Thank you

Alex

Hello Aiman

I tried several boards with the same Altera USB blaster II and the problem was with all boards.

Unfortunately, currently I don't Altera another Altera USB blaster II (just have several Terasic USB blaster - all of them are good).

Thank you.

Alex