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Altera_Forum's avatar
Altera_Forum
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12 years ago

Ethernet Access to linux through FPGA

Hi,

I was wondering how easy the following scenario would be:

1. Network traffic comes into the FPGA fabric

2. Some FPGA pre/post post processing occurs on the data.

3. The data is then passed up to to linux through some kind of AXI interface to be handled by the standard linux network stack.

I am assuming there must be a linux device driver for the triple speed ethernet MAC on the SocKit.

Any ideas with where to start with this?

Regards,

Scott

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    That's a perfectly reasonable scenerio but I don't think there are TSE Linux drivers shipped with the SocKit. I know of others implementing drivers to do this (minus the pre/post processing) but I don't expect it to be ready until the next version of the ACDS is released.

    There are Linux drivers for Nios II and the TSE so I would look for those. I think porting them over to SoC would be the path of least resistence for now.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    We are working on this right now, but are struggling to decide whether to go with the (SGDMA + TSE MAC), or the (mSGDMA + TSE MAC) design. We found that the latest TSE drivers expect the mSGDMA.

    BadOmen, do you have a recommendation? The NIOS II reference design for Cyclone V used the SGDMA design, not the mSGDMA, which I understand was done by you.