Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Ethernet Access to linux through FPGA

Hi, I was wondering how easy the following scenario would be: 1. Network traffic comes into the FPGA fabric 2. Some FPGA pre/post post processing occurs on the data. 3. The data is then p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

We are working on this right now, but are struggling to decide whether to go with the (SGDMA + TSE MAC), or the (mSGDMA + TSE MAC) design. We found that the latest TSE drivers expect the mSGDMA.

BadOmen, do you have a recommendation? The NIOS II reference design for Cyclone V used the SGDMA design, not the mSGDMA, which I understand was done by you.