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Altera_Forum's avatar
Altera_Forum
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9 years ago

Error! Connected system ID hash not found on target at expected base address!

When I run the Nios II Hardware, there is an error "Connected system ID hash not found on target at expected base address"

When I click System ID Properties I get:

expected system id base address: 0x22018

expected system id:0x0

connected system id: not found

expected system timestamp:1487561072

Connected system timestamp: Not Found

[/B][/B]When I use System Console ,it shows

[/B]com.altera.systemconsole.internal.plugin.jtag.oci. Nios2DebugException: Target is broken and needs to be reset

while executing

[/B]how can i fix it? is the fpga broken?

ps download the same program into another fpga board , it runs ok.

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    May I know what are the possible issues?

    Any suggestions would be much appreciated .
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    Hi,

    What board or FPGA are you using?

    I think you are trying to run NIOS II program from FPGA which is not programmed with correct bitstream.
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    --- Quote Start ---

    Hi,

    What board or FPGA are you using?

    I think you are trying to run NIOS II program from FPGA which is not programmed with correct bitstream.

    --- Quote End ---

    Thank you for your help! The board is designed by myself,the FPGA is Ep4ce40f23i7. The same program is OK in other board, I'm sure the program and my operation is right , but there is no systemID ,and When I use System Console ,it shows

    com.altera.systemconsole.internal.plugin.jtag.oci. Nios2DebugException: Target is broken and needs to be reset

    while executing

    I'm sure I download the right .sof file,I thought the FPGA is broken. But I run other program without nios, FPGA runs OK.Is the any other possible issue?
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    Can you write your NIOS CPU settings? From where program code is running ect? Have you tried to recompile your project?

    1. Regenerate your QSYS system.

    2. Recompile your project.

    3. Rebuild NIOS BSP settings

    4. Rebuild NIOS software

    5. Make memory initialization file

    6. Recompile your project

    7. Program .sof file

    8. Try to run NIOS

  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    Check system.h file from the bsp and make sure system ID peripheral is listed there with proper value and base address. Try to regenerate bsp. Also under "Target Connections" tab in "Run Configuration", try refreshing connections multiple times. I faced this issue numerous times when i used to recompile the design & run application.

    If the above approach doesn't work and you are sure you have loaded proper sof, you can check 'ignore mismatched system ID & timestamp' fields and run the application. System ID peripheral is used only to differentiate between the proper bit file and it doesn't affect the operation.
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    I check the system.h file and I'm sure the system ID peripheral is listed there with proper value and base address.And I download the same program into another FPGA board, it runs OK, but Connected system ID hash not found on target at expected base address, I wonder the FPGA is broken, But I run other program without nios, FPGA runs OK.So I don't know why.

  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    --- Quote Start ---

    And I download the same program into another FPGA board, it runs OK, but Connected system ID hash not found on target at expected base address

    --- Quote End ---

    What do you mean runs OK? FPGA and NIOS systems is up and running and only issue is that you can not connect to the NIOS with nios debug tools or NIOS system does not run at all?

    I don't think that FPGA is broken if it works with other programming files. Have you checked that there is no other hardware related issues on second board and FPGA is receiving clock, reset ect. signals which is necessary for NIOS system?