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Altera_Forum's avatar
Altera_Forum
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8 years ago

Error (169175): Pin # with LVDS I/O standard needs a differential output?

Hi,

I'm using a Terasic DE10-lite board with a 10M50DAF484C7G MAX 10. I'm trying to use some LVDS differential outputs but I get this error: 

Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location W13.Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location AB13.
Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location Y11.
Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location Y8.
Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location Y6.
Error (169175): Pin "GPIO" with LVDS I/O standard needs a differential output buffer which is not available on location Y4.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location W12.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location AB12.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location W11.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location Y7.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location Y5.
Error (169175): Pin "GPIO(n)" with LVDS I/O standard needs a differential output buffer which is not available on location Y3.

I'm sure I have chosen the correct pins, which support the LVDS standard (in fact they belong to the groups shown here (https://www.altera.com/documentation/sam1394433606063.html#sam1394435527006)) for this reason I can not explain why this error.

As can be seen from the attached image, the pins I have chosen are indicated with the icons "DIFF_n" and "DIFF_p".

How can I fix it?

Thanks in advance!

(link (https://imgur.com/a/naj91) to large images)

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Hi,

    From your error message, seem like you are assigning the LVDS I/O standard in both positive (p) and negative (n) pin.

    As we understand LVDS is a differential signaling system, meaning that it transmits information as the difference between the voltages on a pair of wires.

    You will only need to assign the LVDS I/O standard for positive (p) pin, Quartus software will auto generate the negative (n) pin which had inverted automatically to pair with the p pin.

    Best Regards,

    irishling

    (This message was posted on behalf of Intel Corporation)
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Hi irishling, thanks for the reply.

    I've tried what you suggest but I continue to receive the same errors. I tried configuring the pins in 3 different ways as you see from this pictures (https://imgur.com/a/l2vjy), but no one has worked. What can you suggest me?
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    --- Quote Start ---

    I tried configuring the pins in 3 different ways as you see from this pictures.

    --- Quote End ---

    Unfortunately we don't see anything from these pictures because the resolution is too low. It's a typical problem when posting *.jpg images in the forum, you should always verify that they are readable.

    I see in the pinout table that the said pins are DIFFIO_RX rather than DIFFIO_TX_RX pin pairs. Means you can assign an LVDS input or an emulated LVDS_E_3R standard to it, but not a LVDS output standard. Review the MAX10 pin connection guide line document for details.
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    --- Quote Start ---

    Hi irishling, thanks for the reply.

    I've tried what you suggest but I continue to receive the same errors. I tried configuring the pins in 3 different ways as you see from this pictures (https://imgur.com/a/l2vjy), but no one has worked. What can you suggest me?

    --- Quote End ---

    Hi, the attached picture is not clear for viewing. For LVDS output, you need to ensure you are assigning the LVDS output yo DIFFIO_TX_RX but not the DIFFIO_RX. For example: pin_W13 is the DIFFIO_RX_B35p which is not supported for the LVDS ouput. I believe the error message should be eliminated once you change the pin location to the DIFFIO_TX_RX such as Pin_P11 (DIFFIO_TX_RX_B20p).

    You may get the Dedicated Tx/Rx Channel pin definition from its pin out file:

    https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/dp/max-10/10m50da.pdf

    Best Regards,

    irishling

    (This message was posted on behalf of Intel Corporation)