epcs controller

Hi Hippo,

my configuration is different. I have:1

MPU HOST (as SPI master) connected with FPGA (here SPI as slave: spi_slave_to_avalon_mm_master_bridge). FPGA is connected as ACTIVE SERIAL and I have to program EPCS with HOST MPU.

This is my problem. Hardware is done and I haven't other possibilities.

For this reason I would to know how EPCS CONTROLLER run and control word bit's meaning.

In my idea I HAVE TO REALIZE (HOST SOFTWARE):

1. use SOF2FLASH to convert .sof into .flash (S-record)

2. write .flash inside HOST flash (by remote control)

3. software to convert .flash to SPI PHYSICAL LAYER for spi_slave_to_avalon_mm_master_bridge with commands for EPCS CONTROLLER

Can You tell me something about point 3?

I have some difficult to find correct use of EPC CONTROLLER.

Bye

Hi Ferraro,

EPCS is like a regular SPI flash of STmicro. EPCS controller is a Altera SPI controller and a hidden onchip memory.

So your configuration might look like this,

MPU ->FPGA[ bridge -> avalon MM bus ->Altera SPI master-> ] EPCS

Right?

- Hippo

Hi Amilcar, can You send me an axample with ASMI?

My problem is: I have to write EPCSand my microcontroller HOST is connecte with FPGA ALTERA with SPI to avalon master bridge.

I have to write EPCS. Do You have an example?

For MSchmitt: thanks but I haven't to program EPCS directly with SPI HOST. I have HOST connected with FPGA and FPGA have to write EPCS.

Bye

G

even the HAL does not tell everything about the epcs controller, normaly you would think okay that epcs device is an SPI memoy so lets have a look at the possible manufacture datesheets to lern more about it.

but there is something between this spi functionality and the epcs related pins specially that you cannot add a simple custom spi functionality. it seems to be possible now with cyclone III, but i haven't tryed that

Why don't you use ALTASMI_PARALLEL ?

It works great.