Efficient 16-bit std_logic_vector comparator in VHDL

Altera provides the LPM_COMPARE IP core, which can be used for more efficient logic synthesis and device implementation compared to writing your own comparator functions. This IP core is customizable to meet specific design requirements.

Here’s the official documentation for reference:

https://www.intel.com/content/www/us/en/docs/programmable/683490/25-1/lpm-compare-comparator.html

I understand your professor may require you to implement the logic manually, but I just wanted to point out that using Altera IP cores can significantly speed up design development.

Regards,

Richard Tan