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Kuru
New Contributor
New ContributorEfficient 16-bit std_logic_vector comparator in VHDL
I'm working on a VHDL project where I need to implement a comparator between two 16-bit std_logic_vector signals, a and b. The goal is to check if a is greater than, less than, or equal to b. Th...
FvM
Super Contributor
Super ContributorUsing different numerical types has no effect on resource consumption, arithmetic operation is essentially the same.
Using carry chain is appropriate for fast comparator, Quartus selects it automatically as default implementation.
Most LUT are used for 32 mux output bits and have nothing to do with comparator function as such.
Using carry chain is appropriate for fast comparator, Quartus selects it automatically as default implementation.
Most LUT are used for 32 mux output bits and have nothing to do with comparator function as such.
FvMSuper Contributor
Super ContributorForgot to mention, to perform numeric operations with std_logic_vector, you need to add VHDL2008 numeric_unsigned or numeric_signed library. Or non-standard Synopsis library before VHDL2008.
