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Altera_Forum's avatar
Altera_Forum
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16 years ago

Downloading FPGA's configuration file into a flash memory

hi,

I am working with a development kit (cyclone II) from Altera and I would like to download the configuration file of my FPGA into the flash memory of my development board so that it can work stand out (I mean by that without being connected to my computer withy an jtarg uart)? Does someone have any idea how I do that ? I tried with the Flash programmer (that I already use to store the code I made with Nios IDE in the flash memory) but it doesn(t work. I have the following error:

4 juin 2009 14:13:52 - (GRAVE) sof2flash: Read error: File: DE1_hw_lab_time_limi

ted.rbf not found, exiting

4 juin 2009 14:13:53 - (GRAVE) sof2flash: Error retrieving data from DE1_hw_lab_

time_limited.rbf

Should I create such a file? I do not know how to generate a . rbf file? Could someone give me some advice?

I would like to add that in the flash programmer I can program FPGA configuration data into hardware image region of flash memory but I need to add an offset. I do not know how to do that properly, where can I find it?

Thank you very much,

éléa

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    You shouldn't have to explicitly create the RBF file. The programmer will do it for you. The problem I believe (and I may be mistaken) is that you can't create an RBF from a time-limited SOF file. So the sof2flash command is failing.

    You may be able to do this another way. What type of flash are you using?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Thank you for your reply. I also believe the problem is that I use a time limited version. I use a flash memory interface (CFI) created by Altera (it is a DE component) which address width is 22 in bits and which data width is 8 in bits also. the flash memory capacity is 4 MB.

    Tell me if I am not clear enough or if you do not understand the way I write english (I am French!).

    thank you for your help

    éléa
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Cyclone II FPGA Starter Development kit

    cyclone II EP2C20F484C7

    I made my own SOPC Builder system but which is (I think) quite complete with at least the required components:

    NIOS II Processor

    (JTAG) debug module

    System ID Peripheral

    Avalon-MM Tristate Bridge

    Flash Memory (Common Flash Interface)

    EPCS Serial Flash Controller
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    So it looks to me like the only way you can configure the FPGA (aside from JTAG) is using the EPCS4 serial configuration device. Is this where you are trying to place the image or are you trying to place it in the CFI flash? Being as it must go into the EPCS4 device, you may be stuck.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    As I am quite new in all those problematics i did not knew I could not store my FPGA configuration file into the CFI. So if I do understand you, I have no other choice to store it in the EPCS4. But I can still store my code (not to configure the FPGA but to use NIOS II) in the CFI , am I right?

    so : file to configure FPGA => EPCS4

    file to use the NIOS II (software) => cfi flash
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Yes, the NIOSII code can be placed in the CFI flash. No problem there.

    The FPGA itself can only load an image from the EPCS4 device so that is the only place you can put an FPGA image on the board. Unfortunately, I cannot think of any method to do this with a time-limited SOF file.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Thank you very much for all your answers! It is really nice of you to have taken time to answer my questions!:)

    éléa:o