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Jonel1's avatar
Jonel1
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4 months ago

DK-DEV-5CSXC6N-B - Require assistance with technical aspects.

I am interested in the DK-DEV-5CSXC6N-B development kit. Could someone contact us to discuss technical details regarding hardware, firmware, and software? We are developing a product for aviation app...
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KianHinT_altera's avatar
KianHinT_altera
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3 months ago

Hi Jonel,

Thanks for the reply and the background of the request, I'm currently checking with our NA sales team whether they are able to connect to you directly to discuss further.

Thanks

Regards

Kian

  • Jonel1's avatar
    Jonel1
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    3 months ago

    Hello Kian,

    I understand that your primary focus is on providing sales support; however, we are in urgent need of technical assistance at the moment, and I hope you understand. I would like to ask a few questions regarding the FPGA code we’re working on. Currently, we are using U-Boot as the boot loader, along with .jic and .rbf for programming. My specific questions are

    1. Our FPGA code for Ethernet is connected to the HPS with an HPS wrapper, whereas in the Intel Eval Kit, the Tri-Speed MAC soft core is used. Is there any advantage to using the Tri-Speed MAC in this case?

    3. Regarding the low-speed results we are seeing, what possible code improvements would you recommend? If feasible, we would also appreciate the opportunity to discuss this further with you.

    • Jonel1's avatar
      Jonel1
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      3 months ago

      Hello Kian,

      I’d like to kindly follow up since it has been a few days without a response. We have identified a possible cause of the issue—using ethtool, we observed that the link is running at 10 Mbps half-duplex, even though we intended it to be 100 Mbps full-duplex.

      May I ask if Intel could provide guidance on this, particularly regarding the software side and any recommended FPGA driver configurations that might help resolve the issue?