differential clock input for EMIF agilex 5

Hi Dany,

I'm not sure if the external clock generator has specific rules but for EMIF IP reference clock, you need to use true differential signaling with differential termination.

As long as the frequency is stable at the desired value, that should be good for EMIF IP.

Agilex 5 device doesn't support single-ended reference clock for EMIF IP.

For external clock generator, it depends on the component requirement. It's not tie to EMIF IP.

For reference, you may check the Agilex 5 Premium Devkit that is using Si5332 for clock generator. https://www.mouser.com/ProductDetail/Skyworks-Solutions-Inc/Si5332E-D-GM1?qs=w%2Fv1CP2dgqoQISLsvW5Sbg%3D%3D

Regards,

Adzim