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Altera_Forum's avatar
Altera_Forum
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18 years ago

Data type used in VHDL

Hi,

I am newbie to VHDL design. I came across a question of using VHDL.

I'd like to output a 17 bit data through one port (one pin in an Altera chip) to my DSP on the the same circuit board. Each bit, either 0 or 1, stands for an error detected in my circuit. Say, if the second bit turns to 1, I will know something is wrong with my temperature sensor....

But, when I set the port as STD_LOGIC_VECTOR (0 To 16), I got the error message that I can not send such data through one pin but 17 pins....

Now, I want to know if I want to send my 17-bit data through one port. What data type should I use?

Your help is highly appreciated!

:confused:

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    You need to serialise the 17 data bits and use a std_logic type. When using a std_logic_vector type as an ouput each bit will tie up with one pin on your device.

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Hi, Ben,

    Thank you for your reply!

    Can I set each bit of the data as STD_LOGIC as well?

    Thanks, again!

    --- Quote Start ---

    You need to serialise the 17 data bits and use a std_logic type. When using a std_logic_vector type as an ouput each bit will tie up with one pin on your device.

    --- Quote End ---

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Setting each data bit to be a std_logic output will use one pin for each data bit and is basically the same as a std_logic_vector with the same number of bits.

    If you want to send 17 bits to your dsp using one pin then you will need to set that output to each data bit one at a time. You will also want to think about sending a clock and a control signal so the dsp knows which bit it is receiving.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Hi, Ben,

    Thank you for your advice.

    I will send one bit to the assigned pin every clk cycle. The clock signal is sent from DSP to Altera chip. I am trying to send my data from Altera to DSP through CAN bus...

    Again, I appreciate your help!

    -ecenus

    --- Quote Start ---

    Setting each data bit to be a std_logic output will use one pin for each data bit and is basically the same as a std_logic_vector with the same number of bits.

    If you want to send 17 bits to your dsp using one pin then you will need to set that output to each data bit one at a time. You will also want to think about sending a clock and a control signal so the dsp knows which bit it is receiving.

    --- Quote End ---

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    What you try to achieve is called a serial protocol, usually. The data is serialized by a shift register and deserialized at the other end. There are different options to achieve synchronicity between sender and receiver. Asynchronous (UART) protocols are using only a single line, a well defined bit rate and a start bit. Synchronous protocols (e.g. SPI) are using a separate clock line and a another signal line as frame sync. Although the hardware effort is higher with the latter, it can be handled much easier. FPGA are versatile in processing of standard or custom data transmission protocols.