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Altera_Forum
Honored Contributor
18 years agoData type used in VHDL
Hi, I am newbie to VHDL design. I came across a question of using VHDL. I'd like to output a 17 bit data through one port (one pin in an Altera chip) to my DSP on the the same circuit bo...
Altera_Forum
Honored Contributor
18 years agoWhat you try to achieve is called a serial protocol, usually. The data is serialized by a shift register and deserialized at the other end. There are different options to achieve synchronicity between sender and receiver. Asynchronous (UART) protocols are using only a single line, a well defined bit rate and a start bit. Synchronous protocols (e.g. SPI) are using a separate clock line and a another signal line as frame sync. Although the hardware effort is higher with the latter, it can be handled much easier. FPGA are versatile in processing of standard or custom data transmission protocols.