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Altera_Forum
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10 years ago

Cyclone V GX Starter Kit - Audio Codec

Hello,

I have recently purchased a Cyclone V GX Starter Kit (https://c5g.terasic.com) which includes an onboard Audio Codec chip (SSM2603). I am fairly new to FPGA's, used them a bit in school and just trying to create something interesting as a hobby.

I have not had any luck producing any sound with this board yet. I found some verilog code online for the DE2 board which i used to come up with verilog code to try to make a simple beep on my board. The DE2 board has a Wolfson WM8731 audio codec chip, which looking at the datasheet is very similar to the SSM2603, I may have tweaked a few things.

I am wondering if anyone has verilog/VHDL code implementing very basic sound output with this SSM2603 audio codec (or the wolfson wm8731) that they would be willing to share so that i can dissect and understand? There is an audio demo for the C5G board on the website, but it uses a lot of advanced features of Quartus, gets into IP cores and everything and is not very basic. I would prefer to have a look at something purely just HDL code and simple.

Alternatively, if anyone is willing to have a look at my code and perhaps see what is wrong (I'm sure much is wrong, but specifically what is not allowing me to play a beep :)) I have attached it.

It is fairly basic.. I use altera_pll to generate an 18.432MHz clock. I then try to communicate via I2C to the SSM2603 to configure everything. Various clock signals are generated, and I generate an audio output signal which is a 400Hz square wave.

If anyone could help in either way it would be greatly appreciated! I am probably missing something fundamental here.. it has been frustrating trying to figure out what is wrong.

Thank you.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I think a better approach for a beginner might be to take the existing audio example project from the product CD and modify it to fit your needs. You should make small changes, testing each one as you go. Make use of SignalTap to look at the working digital audio signal going into the codec. Check that against what you are generating to make sure you have the timing correct. You might want to make a version of the demo that adds your tone generation and uses a switch to control yours vs the demos tone generation going to the codec.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I believe the board is bad. We have two of the boards here at work. One does NOT produce audio out when using the default configuration. The second card does produce the 1Khz signal as the manual says.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Check the solder on the audio output jacks. Sometimes those big lugs are badly soldered. 1/4 of boards (these weren't altera's) had bad audio connectors at my school's lab oh so long ago...

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Good idea. But here is something interesting. I wrote a little RTL to just ask the codec, via I2C, it's "ID". I got no "slave" ACKs and no data response from the codec (I used SignalTapII to view the actual I2C data and clock streams right at the I/O - well as close to the I/O as the tool allows). Trouble is I don't have access to the good board right now so I can't rerun my little RTL I2C test on a known good board to see if the RTL has an error