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ContributorCyclone V custom board VCCIO puzzling behavior
There are new measured data.
If I attached a simple 10k resistor to the 1.2V rail. it will drop back to normal 1.2 range.
But the loaded /w 10k is still measuring 40mV higher than unloaded DCDC w/o the FPGA chip.
So there are some leakage current inside the diode path? from VCCPD to VCCIO?
ContributorThere are new measured data.
If I attached a simple 10k resistor to the 1.2V rail. it will drop back to normal 1.2 range.
But the loaded /w 10k is still measuring 40mV higher than unloaded DCDC w/o the FPGA chip.
So there are some leakage current inside the diode path? from VCCPD to VCCIO?
Super Contributorresult sounds promising, a lower pull-down value like 500R or 1k can hopefully cut unwanted VCCIO leakage. I'd however expect a statement from Intel support, it might be a known problem. Particularly we should get specification of maximal leakage current.
A final question, can you exclude that the problem is caused by a partly damaged device, e.g. due to ESD?
- BrianSune_Froum
No this theory don't holds. If it is damaged by ESD why only 1.2V is able to trigger a higher voltage?
I will highly expected :
A internal VCCPD diode is leakage due to VCCIO-VCCPD high at VCCIO low.
As V(diode) breakdown aka current increase when voltage increase aka basic diode IV model.
However if a ESD had break the barrier then no matter it is what voltage level.I do measured via diode model on meter and all VCCPD and VCCIO related group is almost same.
The data last I got is that around 100uA to 1mA on VCCIO rail can easily remove the voltage increase behavior.
