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ShivaKi's avatar
ShivaKi
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1 year ago

Cyclone V_5CEBA7F27C8N_LVDS and LVPECL Interface_Quartus tool Setting

Hello, In Cyclone V 5CEBA7F27C8N design, we have a LVDS inteface and LVPECL interface. -Cyclone V to generate LVDS output to external IC -Cyclone V to receive LVPECL input from external IC. Consi...
Configuration
Generic Io
Programmable Logic Device
ShivaKi's avatar
ShivaKi
Icon for New Contributor rankNew Contributor
1 year ago

Hello Frank,

While setting the IO standard as "LVDS" for differential outputs and "LVPECL" for differential input signals, the Quartus tool is showing an error.

Error context is :

"Error (21179): Pins SIGNAL_P and SIGNAL_N form a differential pair and uses pseudo-differential output node.

-However, these pins also have an I/O standard LVDS that cannot be supported by the pseudo-differential output node."

Error (11802): Can't fit design in device

Error (293001): Quartus Prime Full Compilation was unsuccessful. 10 errors, 230 warnings"

Could you please let us know how to resolve this issue?

Note: All differential pairs assigned with LVDS/LVPECL are showing same error