Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

cyclone iv LVDS

Hi All,

In one of our project we are using cyclone iv gx FGPA and AD9228 adc. Ad9228 operates and 1.8v and it has LVDS interface. FPGA's VCCIO is connected with 3v3. I hope this doesn't create any problem. But when read the data sheets of FPGA, it says if we want to use LVDS option then the VCCIO is to be connected with 2v5. Is my understanding right.If that is the case then do we must change our FPGA's vccio to be connected with 2.5. Please help me on this.

Also do I need to connect external 100ohm resistor between differential pair?

Thanks,

Raja

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Cyclone V FPGAs operating the LVDS I/O standard need the associated bank to be powered at 2.5V. This is the way Altera have chosen to power LVDS transceivers but isn't how all manufacturers have chosen to drive LVDS interfaces.

    So, connecting your FPGA's LVDS interfaces (from a bank powered at 2.5V) to an LVDS interface on a device powered at 1.8V is fine. It is the LVDS standard that is important here, not the respective power rails.

    As for the 100Ω resistor - refer to figure 54 in the datasheet for the ADC. It identifies how they intend you to terminate the LVDS signal into the ADC. Generally, you will need a 100Ω termination anywhere that it is NOT built into the terminating receiver.

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Thank you Alex.

    Also do I need to connect any AC coupling capacitor? If yes please help me in calculating AC coupling capacitor. This regarding ADC outputs data, data clock, frame clock to FPGA inputs. Please let me know if any further information is needed.

    Thanks,

    Raja
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Refer to the "LVDS I/O Standard Support in Cyclone IV Devices" section of the "I/O Features in Cyclone IV Devices" document. Page 6-29:

    http://www.altera.com/literature/hb/cyclone-iv/cyiv-51006.pdf (http://www.altera.com/literature/hb/cyclone-iv/cyiv-51006.pdf)

    This discusses the Cyclone IV's requirements for terminating 'true' and 'emulated' LVDS signals. This is relevant depending on the I/O bank you connect your LVDS connections to.

    Use this information in conjunction with the datasheet for the ADC and you should be able to establish whether or not you need ac coupling caps - I don't think you will. :)

    Cheers,

    Alex