Cyclone IV configuration - nCONFIG signal and JTAG programming issue

Hi,

according to the Cyclone IV handbook, pin 4 of the USB Blaster connector should be tied to VCCA, which s 2.5V in your case, but you connect it to 3.3V. It is not quite clear to me what the USB Blaster does with that signal, so I'm not sure if that is really bad.

However, what bothers me is that you say that nCONFIG goes low. I agree that this pin should be high, since you pull it high, and the Cyclone IV really doesn't seem to have a driver for that pin. Did you check, e.g. using a multimeter that VCCIO is stable? Maybe the DC-DC comes up properly, but then goes into CC or hiccup-mode, which would explain why nCONFIG shows a random timing when going low again.

Another stupid idea: is it possible that you accidentally used the very same pull-up resistor for both nSTATUS and nCONFIG? Or that these are too close together and shorted during soldering? That would also explain, as nSTATUS is driven low by the FPGA immediately after power-up.

Best regards,

GooGooCluster

Hi,

nConfig problem is solved. The E-PAD was not properly connected to GND :). However JTAG is still not working (JTAG Chain Broken). The snap shot of different signals is attached:

A0: TCK

A1: TDO

A2: TMS

A3: TDI

A4: nSTATUS

A5: nCONFIG

There is no activity on TDO which stays high all the time. Any ideas why is that ?

Thanks

You shouldn't have nSTATUS high without nCONFIG high. It's your responsibility to 'drive' nCONFIG. This could well amount to a simple pull-up resistor. I'd suggest you either have a manufacturing fault or one (or more) of your power pins are not powered. Check them all.

The JTAG will not work unless nCONFIG is high.

Yes, you should power your USB-Blaster from VCCA (2.5V). However, this is a common design fault that is not likely to be, or cause you, a problem. I do recommend you correct it, by modifying your board, and certainly if you re-spin the board.

If connected for JTAG only you should also ensure DCLK and DATA0 are drive high or low (whichever is convenient), don't leave them floating.

Refer to Table 8-20 on page 8-64 of the configuration and remote system upgrades in cyclone iv devices (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf) for an explanation of the relevant configuration pins. Also note the behavior of nCONFIG and nSTATUS in any of the 'Configuration Timing Waveform' figures.

Cheers,

Alex

How should i check either Cyclone IV has some kind of manufacturing issue. Because I am facing same kind of problem with my custom board. nConfig and nStatus are at 3V3. Epad is properly connected. But still not been able to configure via JTAG or AP.

Regards

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You shouldn't have nSTATUS high without nCONFIG high. It's your responsibility to 'drive' nCONFIG. This could well amount to a simple pull-up resistor. I'd suggest you either have a manufacturing fault or one (or more) of your power pins are not powered. Check them all.

The JTAG will not work unless nCONFIG is high.

Yes, you should power your USB-Blaster from VCCA (2.5V). However, this is a common design fault that is not likely to be, or cause you, a problem. I do recommend you correct it, by modifying your board, and certainly if you re-spin the board.

If connected for JTAG only you should also ensure DCLK and DATA0 are drive high or low (whichever is convenient), don't leave them floating.

Refer to Table 8-20 on page 8-64 of the configuration and remote system upgrades in cyclone iv devices (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf) for an explanation of the relevant configuration pins. Also note the behavior of nCONFIG and nSTATUS in any of the 'Configuration Timing Waveform' figures.

Cheers,

Alex

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Hi Alex,

Yes, in my design both nCONFIG & nSTATUS are pulled high by a 10K resistor to VCCIO. You can see in the latest attachment that both nSTATUS (A4) and nCONFIG (A5) signals are high during JTAG scan. It was unconnected E-pad that was causing nConfig to go LOW.

I forgot to mention, both DCLK and DATA0 are also tied to VCCIO. I have also tried to perform JTAG scan with 2.5V on Pin.4 of JTAG connector (Powering USB Blaster) but TDO remains stuck at High.

Well done on fixing nCONFIG. You still need to check all the power and ground pins are connected up. Beyond that the bare minimum you need to allow JTAG to work is:

nCE low.

nCONFIG pulled up.

nSTATUS pulled up.

MSEL pins connected to GND or VCCA (2.5V).

DCLK & DATA0 at valid levels.

Cheers,

Alex

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Well done on fixing nCONFIG. You still need to check all the power and ground pins are connected up. Beyond that the bare minimum you need to allow JTAG to work is:

nCE low.

nCONFIG pulled up.

nSTATUS pulled up.

MSEL pins connected to GND or VCCA (2.5V).

DCLK & DATA0 at valid levels.

Cheers,

Alex

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Thanks Alex. JTAG is working now and I am getting correct IDCODE. Now when I try to program any SOF file, the progress bar moves till 75% and then programming Fails. Is there a way to know what operation is failing during JTAG programming ? Further I am using EP4CE22E22 Chip while "AUTO DETECT" operation shows only EP4CE22.

Signal integrity. I've had similar, intermittent issues before and it turned out to be a signal integrity issue between the USB-Blaster and the board. How are you programming the FPGA? Using a USB-Blaster or something else?

What revision is the USB-Blaster? The older units - rev A especially - have trouble with the newer FPGA families (I count Cyclone IV in that). Do you have particularly long JTAG traces on your PCB?

Cheers,

Alex

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Signal integrity. I've had similar, intermittent issues before and it turned out to be a signal integrity issue between the USB-Blaster and the board. How are you programming the FPGA? Using a USB-Blaster or something else?

What revision is the USB-Blaster? The older units - rev A especially - have trouble with the newer FPGA families (I count Cyclone IV in that). Do you have particularly long JTAG traces on your PCB?

Cheers,

Alex

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I am using USB Blaster Rev.B. Traces on PCB are not long (< 1 cm) but the JTAG cable is ribbon type about 6 inches in length. Could that be an issue with new FPGAs?

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I am using USB Blaster Rev.B. Traces on PCB are not long (< 1 cm) but the JTAG cable is ribbon type about 6 inches in length. Could that be an issue with new FPGAs?

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I think it is not the problem with long JTAG cable as I have program my Altera cyclone II custom board with same JTAG length of cable. So is there any who can let me know that there is a problem with Rev of USB Blaster.