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Vic3Dexe's avatar
Vic3Dexe
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Cyclone III slave (PS) embedded memory errors

I have two Cyc III devices (master-slave, AS and PS respectively) + EPCS16 flash. In both devices I have ROMs (megafunction), one in the master and two of them in the slave. All ROMs are initialize...
  • Vic3Dexe's avatar
    Vic3Dexe
    3 years ago

    I think I've found the problem.

    There is a trace connected to pin 76 on the master and pin 99 on the slave. Trace is pulled up to 3.3V via 2.2k

    This **bleep** resistor was dead, and the trace was actually floating.

    I didn't use this pins before, so I can't reveal the resistor is dead.

    As I start to use it, all logic became a total mess. Something worked, something not. By elimination I found the culprit.

    I can't explain how this trace connected with loading errors (when FPGA not even in user mode), but the fact is - replacing resistor solved all problems, ROMs working now (though I don't use them anymore).

    Thanks to all, problem solved!

hareesh's avatar
hareesh
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

Hi Vic3Dexe,


From the post, I understand that you are facing issue reading data from ROM through the slave. Commonly this type of issues occur when there is a problem with MIF file. Please regenerate the .MIF file by following the procedure in the below article, it should resolve the issue. Please feel free to write back if you have queries.


Article :

https://www.intel.com/content/www/us/en/support/programmable/articles/000078411.html


Thanks and Regards

Hareesh






  • Vic3Dexe's avatar
    Vic3Dexe
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago
    @hareesh wrote:

    From the post, I understand that you are facing issue reading data from ROM through the slave.


    No, the problem is: the slave is always loads its ROMs with erros (from EPCS or from JTAG). The only way I can load ROMs correctly is through the In-system memory content editor. When I program ECPS I get no errors from quartus (with verification or not). So, EPCS itself is loaded correctly.

    MIF files are ok. I did not change them and recompiled the whole project dozens of times.

    I've tried to remove buffers and change them to zero Ohm resistors - no changes.

    Then I've replaced 0R resistors to 51R ones - no changes.

    Then I've put buffers back, cutted traces afters them (which are facing to the slave), and put 51R there. No changes.

    I'll repeat myself:

    Is there some error checks inside Cyclones when they downloads firmware from EPCS? If so, why it not includes content of pre-initialized memory?