Altera_Forum
Honored Contributor
15 years agoCyclone III AS Configuration timing question
In the Cyclone III Handbook (Vol 1, Ch 9), it makes it clear that --
--- Quote Start --- In the AS configuration scheme, the serial configuration device latches input and control signals on the rising edge of DCLK and drives out configuration data on the falling edge. Cyclone III device family drives out control signals on the falling edge of DCLK and latch configuration data on the falling edge of DCLK. --- Quote End --- It subsequently notes that -- --- Quote Start --- The timing parameters for AS mode are not listed here because the tCF2CD, tCF2ST0, tCFG, tSTATUS, tCF2ST1, and tCD2UM timing parameters are identical to the timing parameters for PS mode listed in Table 9–13 on page 9–39. --- Quote End --- That (PS Configuration Timing Parameters table 9-13 on pg 9-39) only specifies that tdsu (DATA0 setup time) must be at least 5 nsec prior to the DCLK rising edge; and tdh (DATA0 hold time) must be at least 0 nsec after the DCLK rising edge. My Configuration problem appears to be in the Data0 content that's latched in to the Cyclone III (as delivered during Fast Read) from an EPCS16. These data are latched in on the falling edge of DCLK. I have examined the signal relationship and quality using a scope, but I don't understand the timing specifications from Altera's handbook since for AS Configuration they don't seem to indicate the real setup and hold requirements, relative to DCLK falling transitions. Does anyone know the C-III AS Configuration read operation setup/hold requirements, to DCLK falling edges? Thanks; Larry.