Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCyclone III AS Configuration timing question
In the Cyclone III Handbook (Vol 1, Ch 9), it makes it clear that -- --- Quote Start --- In the AS configuration scheme, the serial configuration device latches input and control signals on th...
Altera_ForumHonored Contributor
Honored ContributorIn a short, if you didn't introduce special issues in your hardware, I won't expect timing errors with AS configuration. Actually, I never experienced it with any Cyclone I - Cyclone III design.
Generally, the serial flash communivation is using a SPI mode 0 scheme which should give sufficient timing margin at AS clock speeds. You didn't mention the involved Quartus version and AS programming method. Some recent Quartus versions e.g. had bugs related to compressed AS bitstreams.
