Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi,
the EPCS devices are compatible with all the FPGAs which support Active Serial configuration. In fact, EPCS are plain serial flash. A common setup is to have AS+JTAG, without any pin headers in the AS signals, only for the JTAG signals. This requires use of JTAG indirect programming to read/write the EPCS but it's more practical than having two sets of pin headers for the ByteBlaster. The document you want is the Cyclone III handbook configuration section. http://www.altera.com/literature/lit-cyc3.jsp I don't think there's any documentation on designs which support more than one configuration scheme (other than JTAG) though.