Cyclone 3 Not entering AS Mode

Hi,
I think some details of the error report are still unclear. What's meant e.g. with "I was having an issue with jtag and I grounded the pad." Grounded which pad?

I generally agree with sstrell that i looks much like a problem of correct PCB wiring and signal integrity.

Not sure if the FPGA relatic schematic part is shown completely. I'm missing e.g. JTAG pull-up/-down resistors. Particularly missing 1k TCK pull-down can cause erratic operation of JTAG logic and e.g. block AS configuration. The schematic shows about no supply bypass capacitors, this can cause serious issues depending on PCB layout. But I won't finally assess possible power and signal integrity problems without seeing full schematic and layout.

First step of AS circuit test is successful JTAG indirect flash programming and verification. If this doesn't work, it's rather unlikely to get AS configuration loaded.

A specific question was about DCLK operation. DCLK is driven by the FPGA during AS configuration. In addition, Intel AS programming IP (e.g. ASMI) is sending continuous DCLK. Unless you instantiate respective IP in your design, DCLK shoul be quiet in user mode.

Regards
Frank