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MinzhiWang's avatar
MinzhiWang
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Cyclone 10 GX device issue

Hello Guys,

Can we apply operating for Cyclone 10 GX devices like ECO? I know that Cyclone 10 GX serial devices don't support ECO operation in Quartus Prime Pro. Does Intel provide any other methods for user to operate or modify or adjust properties?

As following image, I want to constrain one signal to be fed into ALUT thru specified port, for example DATAF port. If ECO supported, this can be implemented easily. However, I can't use ECO function for Cyclone 10 GX device. So I request whether Intel can provide other way or method for user to implement this kind of tasks.

14 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    Why do you need to do this? Are you saying you can't go back and alter the design? And why do you think you can't make an ECO change? Cyclone 10 GX doesn't prevent this as far as I know.

    • MinzhiWang's avatar
      MinzhiWang
      Icon for Occasional Contributor rankOccasional Contributor

      Hi sstrell,

      1. I posted one thread for ECO issue of C10GX devices, https://community.intel.com/t5/Intel-Quartus-Prime-Software/Does-QPP-Quartus-Prime-Pro-hide-or-disable-engineering-change/m-p/1593364#M82725

      I thought I have got the answer, C10GX doesn't support ECO any more, as follow image shows. The ECO function is disabled for C10GX devcies.

      If you have oppsite answer, please let me know and prove it for me. I'll appreciate for this.

      2. Why do i need to do this? I just want to use ECO funtion on C10GX deives. It's that simple.

      • FvM's avatar
        FvM
        Icon for Super Contributor rankSuper Contributor
        Hi,
        I think the thread title is misleading. You are specifically asking about ECO operation in QPP resource property editor. If I understand the ECO chapter in QPP User Guide, Design Optimization correct, ECO is performed through TCL commands, in so far operation is different from QPS. If the specific operation you are trying is feasible or not, I can't say. There might be other limitations.

        Generally, it's substantiated to ask what you are trying to achieve. Changing a LUT input can change delay. But I'd expect that Quartus fitter selects the best available connection according to timing constraints in effect.
  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor

    As you may already know, Cyclone 10 GX does not support ECOs.


    Could you share your design by archiving the project (Project > Archive Project) so that I can ask the internal team for an alternative way?

    If possible, could you help to pinpoint which LUT connection in your design needs to be preserved?


    Regards,

    Richard Tan



    • MinzhiWang's avatar
      MinzhiWang
      Icon for Occasional Contributor rankOccasional Contributor

      Hello Richard,

      Yes, I know that Cyclone 10 GX doesn't support ECOs. I posted this thread to ask if there any other methods, for example setting in source codes to complet my purpose.

      I will post one simple project here. Actually, I just want to know several key LUTs connection changing method.

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor

    Hi

    Any update on this? Do you have the project to share with us?


    Regards,

    Richard Tan


    • MinzhiWang's avatar
      MinzhiWang
      Icon for Occasional Contributor rankOccasional Contributor

      Hello Richard,

      Sorry to post my delayed response here now.

      Yes, I was preparing my simple project these days. I just wanted to think how to create one simple project to explain what I am just asking.

      The attached archived project is this created project, please help check it. Which was created based on our current ADC processing project. Please ignore other parts. My question only focuses on 3 nodes or LE cells, which are coded as following

      LaunchCT <= operation_mode_sel_sig;
      Ch0Hit <= trig(0) when LaunchCT='1' else calibHit;
      Ch1Hit <= trig(1) when LaunchCT='1' else calibHit;
      Ch2Hit <= start when LaunchCT='1' else calibHit;
      
      u0_carry: carryin_test port map (carryin => Ch0Hit,carryout => cout0);
      u1_carry: carryin_test port map (carryin => Ch1Hit,carryout => cout1);
      u2_carry: carryin_test port map (carryin => Ch2Hit,carryout => cout2);

      There are 3 I/O pins come from outside and they are fed into same logic module which is named as "carryin_test". Which is implemented as following image, so only two ALUTs are used to realize this module.

      I have added physical location constrains for these 3 carryin cells and make them closed to those 3 I/O pins.

      Above image shows the constrain format, however, only the third can be applied. The first two constains will push Quartus giving errors imformation:

      Could you give me the expalnation about above error?

      I resolved above error to constrain the first two cells as the third cell. It just corrects "N24" to N0. After that, I still get the following warning:

      Could you give me the explanation about above waring info? What's the mean of "will be dropped"?

      All above comments are just about this simple project creatation. Now let's go back into my primary question about the inside connections of the cell/node. The following image shows the inside of the cell (ALUT). This is very simple, there is only one input signal is fed into this ALUT. It is connected to DATAC of the ALUT. My question is, if ECO is not allowed to use for Cyclone 10GX, is there any other ways to control the input signal to connect to the ALUT input ports? You know I have total 3 I/O input signals, I want to control them to connect the same ALUT input ports, for examle, all connct to DATAC, instead of one connects DATAA, one connects DATAB, and the last one connects DATAC. Which are uncertainty connection. What i need is fixed connection, then i can get almost same time delay for these paths.

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    Hi MinzhiWang,


    This case is a bit complicated, I will need to take some time to investigate and get back to you as soon as I can.


    Thanks


    • MinzhiWang's avatar
      MinzhiWang
      Icon for Occasional Contributor rankOccasional Contributor

      Hi Kenny,

      I noticed it, thanks for you hard work to process my question.

      BTW, can Intel open one simple patch, which can open ECO function for us to use on Cyclone 10 GX devices?

      Thanks

      Best Regard

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    If this is a non supported feature, Intel will not create a patch for it. As having to create patch for this large feature require a lot of validation and etc.


    I am trying to see if we have alternative for your application.


  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    Thanks for having a call with us, WYSIWYG might be useful for your use case.


    We provided user guide on WYSIWYG in the your email, we will look for reviving the userguide in the future.


  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    Hi,


    Not sure if you have further update? Can we close the case?


    Thanks


    • MinzhiWang's avatar
      MinzhiWang
      Icon for Occasional Contributor rankOccasional Contributor

      Hello Kenny,

      Yes, you can close this case.

      Thanks