Configuring active serial PROM and CPLD in single JTAG header chain

of course you can

make shure your fpga is the first in the jtag chain, otherwise you must tell all your scripts and tools to use device 2 what is a pain. if the fpga is the first in the row then you just connect the jtag to your pcb and quartus and all others run as there is only one device

in my designs i have

jtag tdo pin 3 <- MaxII TDO

MaxII TDI <- FPGA TDO

FPGA TDI <- JTAG tdi pin 9

so your cpld is the first device on jtag chain

Thanks michael

Have you used Serial Flash Loader to program active serial PROM?

i am using quartusII7.2. Is this version enough for my requirement?

also don't forget i should use serial flash loader technique to configure PROM.

Regards,

Raja.S

i am quite unshure what you mean with serial flash loader.

the epcs is initially programmed via the command line tools using the usb blaster and later via our operating system if an update is performed.

7.2 is quite old and there have been some changes.

is there a reason to keep 7.2 and not upgrade to 9.0 sp2 ?

for information on serial flash loader please refer

1] page 468-470 in altera configuration handbook

2] an370

i cant use version other than quartusII7.2 coz i dont hav license for others.