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Altera_Forum
Honored Contributor
13 years agoConfigure one FPGA from another with a PFL
I started with an existing VXI/VME module design where a MAX II is used as the Backplane interface and configures the FPGA on the board from a parallel flash using the PFL megafunction.
In this design there were several bus sharing issues on the board so I hope to replace the MAX II with a Cyclone III to get more memory and memory management processes right at the backplane interface without having to go out on the local databus of the module. I would configure this VXI/VME Interface FPGA with a dedicated EPCS. I hoped to configure the other FPGA on the module as I had before with the MAX II and the PFL. However the megafunction wizard does not appear to let me generate a PFL to configure an FPGA if the PFL is going into an FPGA. Am I stuck here?4 Replies
- Altera_Forum
Honored Contributor
Apparently, Quartus isn't prepared to implement a PFL virtual JTAG instance for FPGA targets. It should be possible, to port the MAX II PFL design to FPGA because it's pure readble HDL code.
I'm not sure, if the PFL functionality available with Cyclone III for configuration of the device itself can be used for an "external" PFL interface. But it may be possible. - Altera_Forum
Honored Contributor
Alright, I am still looking for that easy out. However, I could write my own. I believe I just need to
1. request the bus the Flash is on. 2. get a permit for the bus. 3. read the flash to a FIFO (8x32 deep) 4. serialize the data and clock it over also 5. i need to do the right thing with nCONFIG, nSTATUS, and CONF_nDONE. 6. store the Flash memory page number that I put the config file in. 7. ignore use of burst mode when reading Flash. I do not need speed. It would be helpful if you could point me at the best format for the compiled data and a timing diagram (Passive Serial). What do you think? - Altera_Forum
Honored Contributor
I had a similar issue with PFL, so wrote my own controllers. These designs are documented here:
http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf Cheers, Dave - Altera_Forum
Honored Contributor
Dave,
In my neck of the woods, I put out pretty good documentation. But this is looks phenomenal. Thanks