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JonGoh's avatar
JonGoh
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11 months ago

Configuration via Protocol (CvP) fail after loading the periphery image

Hi,

May I know if this issue has been resolved in newer versions of the CvP driver? I am still facing CvP intermittent failing problems and was wondering whether there are other workarounds other than the need for a power recycle.

"Due to a CvP upstream driver issue, CvP may intermittently fail after successfully loading the periphery image into all Intel Agilex® devices with package code R31C / R31B.".

Here is the link where I found the article:

https://www.intel.com/content/www/us/en/support/programmable/articles/000089044.html

Thanks,

Jon

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  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    11 months ago

    Hi,

    Please try out 5.10.110-lts version as that is verified kernel that is working.


    Thanks.

    John Tio


  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    11 months ago

    Hi,


    If you are still facing intermittent failure can you provide the log file from this command "dmesg | tail -4"? This will provide more detail on what is happening when you are performing CvP programming



    • JonGoh's avatar
      JonGoh
      Icon for New Contributor rankNew Contributor
      11 months ago

      Hi @JohnT_Intel ,

      Yes I am still facing intermittent failures. Here are the log files.


      [12201.065931] altera-cvp 0000:01:00.0: Timeout waiting for credit
      [12201.065934] altera-cvp 0000:01:00.0: Wait Credit ERR: 0xffffff92
      [12201.065936] fpga_manager fpga0: Error while writing image data to FPGA
      [12201.066005] fpga_manager fpga0: fpga_mgr_load returned with value -110

      Thanks,

      Jon

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    11 months ago

    Hi,


    While I am working with the engineering team on this, can you help try to increase the timeout value to see if it can resolve the issue?


    drivers/fpga/altera-cvp.c file.

    Change "#define V2_CREDIT_TIMEOUT_US 40000" to "#define V2_CREDIT_TIMEOUT_US 60000"


    Thanks.



  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    11 months ago

    HI,


    Thanks for confirming that updating the timeout value resolved the issue in our call discussion


  • freddy3366's avatar
    freddy3366
    Icon for New Contributor rankNew Contributor
    10 months ago

    Hey, I’m not sure if it’s fixed in the newer CvP driver versions, but the intermittent failures seem to still be a thing for some. If power recycling isn’t ideal, maybe reach out to Intel support—they might have alternative workarounds. Good luck!