Cannot generate pcie avmm example design

Using Quartus Prime Pro 22.3. During the file generation process, it first creates the example design in the temporary folder on the C drive. However, in the final step, I encounter an issue where a file cannot be added: C:\Users\windows\AppData\Local\Temp\alt9605_128249265337967079.dir\0004_pcie_s10_hip_avmm_bridge_0_gen\ip\pcie_ed\pcie_ed_jtag_to_master_avalon_bridge\altera_jtag_avalon_master_191\sim\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v.

I find it strange that it consists of two identical '.v' filenames with an "\", which doesn't seem to be reasonable. During the creation of the example design, I was able to locate this file, but its name is pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v, rather than the one mentioned in the error message pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v\pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v."

L-tile and H-tile Avalon® Memory mapped Intel FPGA IP for PCI Express

configuration is PCIE gen3X4

native endpoint

enable avmm DMA

example design environment ：system

select design : DMA

then generate , the error will occur

Error: add_fileset_file: No such file C:/Users/windows/AppData/Local/Temp/alt9605_128249265337967079.dir/0004_pcie_s10_hip_avmm_bridge_0_gen/ip/pcie_ed/pcie_ed_jtag_to_master_avalon_bridge/altera_jtag_avalon_master_191/sim/pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v/pcie_ed_jtag_to_master_avalon_bridge_altera_jtag_avalon_master_191_3zppvky.v
while executing
"add_fileset_file $relative_item [ ::altera_pcie_s10_hip_avmm_bridge::fileset::filetype $absolute_path ] PATH $absolute_path"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $relative_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker" line 6)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::folder_worker $top_item"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::add_files_recurs..." line 7)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::add_files_recursive [ pwd ]"
(procedure "::altera_pcie_s10_hip_avmm_bridge::generate_design_example_f..." line 63)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::generate_design_example_files ${QSYSTemPath} ${QSYSTemName}"
(procedure "::altera_pcie_s10_hip_avmm_bridge::generate_dynamic_qsys" line 671)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::generate_dynamic_qsys"
(procedure "::altera_pcie_s10_hip_avmm_bridge::dynamic_example_design" line 97)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::dynamic_example_design"
(procedure "::altera_pcie_s10_hip_avmm_bridge::fileset::callback_example..." line 2)
invoked from within
"::altera_pcie_s10_hip_avmm_bridge::fileset::callback_example_design pcie_s10_hip_avmm_bridge_0_example_design"