Forum Discussion
19 Replies
- Altera_Forum
Honored Contributor
Quartus already does RBF file output, You have to select an option to enable rbf generation. For ELF, You need to convert it to HEX using elf-to-hex and later You need a 3rd party tool to convert HEX to BIN. Remember, that RBF file is LSB 1st afaik, so You need to do a bit swap.
- Altera_Forum
Honored Contributor
I'm aware that Quartus already does RBF file output. There are some finer points that i'm curious about.
1. If I build an SOF with the nios elf file included, can it be converted to an RBF that will initialize the nios memory? 2. If nios memory is in external SDRAM, will the RBF initialize SDRAM? 3. Has anyone done this? Best regards, V - Altera_Forum
Honored Contributor
--- Quote Start --- 1. If I build an SOF with the nios elf file included, can it be converted to an RBF that will initialize the nios memory? --- Quote End --- How do You do that? You mean You generate SOF file, which has on-chip memory initialization file inside? If yes, then Nios CPU has to have startup vectors to point to on-chip memory. --- Quote Start --- 2. If nios memory is in external SDRAM, will the RBF initialize SDRAM? --- Quote End --- NO. You need to add on-chip memory as I've mentioned in (1), then write a small bootloader, which would fit into the on-chip memory and get executed after system startup. That bootloader will have to copy all the required program data to SDRAM and jump to that place. --- Quote Start --- 3. Has anyone done this? --- Quote End --- Yes, I use on-chip memory of 8KB size with my 4.2KB bootloader pre-compiled. The bootloader copies all the Nios binary from serial flash to SDRAM and executes the main program. - Altera_Forum
Honored Contributor
--- Quote Start --- How do You do that? You mean You generate SOF file, which has on-chip memory initialization file inside? If yes, then Nios CPU has to have startup vectors to point to on-chip memory. NO. You need to add on-chip memory as I've mentioned in (1), then write a small bootloader, which would fit into the on-chip memory and get executed after system startup. That bootloader will have to copy all the required program data to SDRAM and jump to that place. Yes, I use on-chip memory of 8KB size with my 4.2KB bootloader pre-compiled. The bootloader copies all the Nios binary from serial flash to SDRAM and executes the main program. --- Quote End --- I have a Nios program too big to fit into on-chip memory (similar to simple socket server). I have external SDRAM and flash with active parallel setup (no EPCS). Do I also need a bootloader? - Altera_Forum
Honored Contributor
Yes, You need a bootloader, which would fit into on-chip memory. This bootloader will have to copy Nios program from flash to SDRAM and start it.
- Altera_Forum
Honored Contributor
--- Quote Start --- Yes, You need a bootloader, which would fit into on-chip memory. This bootloader will have to copy Nios program from flash to SDRAM and start it. --- Quote End --- I am having a hard time getting this to work. I've tried quite a few approaches and the closest I've gotten is using the advanced boot loader in AN 458. I've reached a point where I can program the FPGA with the .pof file with just the hardware system, then download the bootloader app through nios EDS and that works almost. If I put the bootloader app's hex file into the on-chip RAM initialization, then it freezes within the first couple of seconds on power-up, never changing LEDs to indicate it's loading code, but an LED does come on indicating that the program started, rather than when I download the code and executes all the way through. With JTAG output enabled, it prints out 1 1/2 lines of stars then crashes. Disabling the JTAG in the code and in the BSP editor didn't seem to make a difference. Even when I download the working bootloader, it can't find my design which I programmed in with the AN 458 instructions at the first design offset. I've tried both loading it right in from the CFI flash and loading it in via on-chip memory. I appreciate your help. - Altera_Forum
Honored Contributor
Did You set the reset and exceptions pointers correctly? Also did You correctly generate hex file from elf file?
- Altera_Forum
Honored Contributor
--- Quote Start --- Did You set the reset and exceptions pointers correctly? Also did You correctly generate hex file from elf file? --- Quote End --- I assume that the reset vector should be offset 0 of the on-chip memory. What is the exception vector supposed to be? Right now I have it pointing to the sdram. I have been using this command to generate the hex file, and have it set in the on-chip RAM to load, and the RAM summary after compilation confirms this: elf2hex bootloader.elf <on chip ram start in SOPC> <on chip ram end in SOPC> --width=32 --create-lanes=0 --record=4 ../../bootloader.hex - Altera_Forum
Honored Contributor
Well, I don't do those --create-lanes or --record, plus I am not sure about the hex length... Afaik I set it maximum possible. Anyway, the last thing that should do the job: did You enable memory contents initialization in on-chip ram and set the bootloader hex file You've generated before?
Post the on-chip memory properties window screenshot. - Altera_Forum
Honored Contributor
What's the point of that slow clock in the system? Nios II/f will definitely run on 75MHz, so I'd just use the same clock in all components. Are You using JTAG_UART in bootloader app? E.g. doing a printf() or something?