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Altera_Forum's avatar
Altera_Forum
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16 years ago

buffer for clock signal?

Do Quartus has an buffer for split the clock signal (200MHz)?

----------------------------- clock (200MHz)

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node1 node2 node3

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Do Quartus has an buffer for split the clock signal (200MHz)?

    ----------------------------- clock (200MHz)

    | | |

    | | |

    | | |

    node1 node2 node3

    --- Quote End ---

    Hi,

    in case your are using a global input, the clock is distributed to all parts the FPGA.

    Kind regards

    GPK