big design uses few resources

I am having the same issue. I created a system with multiple processors each having a level 1 debugger. This design did not optimize away all my modules.

Then, I used the same system but removed the debugger from each processor. This design optimized away all my modules.

I've taken a look at the .map.rpt file and it certainly shows a lot of removed logic, but I'm not sure what connections I need to make. The only connections to my system (nios_system) are two inputs (clk, and reset_n). These are both connected (I believe?) in my top level module where I instantiate the system. Any ideas?