Auto Washing Machine for FPGA (VHDL Codes)

I did not fully understand the question. I think you might have asked how to do a FSM and a counter/timer. I would advice you to read a vhdl book and do the exercises for the first few chapters to get the hang of the basic principles of parallell vhdl and processes.

If you want to do a fsm you use a process and a case statement. If you want to do a timer you'll need to create a counter (also a process). I myself program in VHDL by the way, if you're using verilog you can stop reading (:

If you create a new vhdl file in quartus you can right click in the editor and "insert template" and select a template for a whole file or code for different blocks.

//Ola

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I did not fully understand the question. I think you might have asked how to do a FSM and a counter/timer. I would advice you to read a vhdl book and do the exercises for the first few chapters to get the hang of the basic principles of parallell vhdl and processes.

If you want to do a fsm you use a process and a case statement. If you want to do a timer you'll need to create a counter (also a process). I myself program in VHDL by the way, if you're using verilog you can stop reading (:

If you create a new vhdl file in quartus you can right click in the editor and "insert template" and select a template for a whole file or code for different blocks.

//Ola

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haha... i too crazy nw till i also dont know what i am talking about?!

actually i needing a flow to design the washing machince controller!

EXP: Design a 4 bits register

the 4 bits register can form by 4 units of D flip flop!

so i just want to know to design a washing machine controller (CPU) by VHDL, should have what elements there? if i got the image about the flow then i can write the codes by myself! Be honest, my digital not strong also!