Honored Contributor
Honored ContributorI did not fully understand the question. I think you might have asked how to do a FSM and a counter/timer. I would advice you to read a vhdl book and do the exercises for the first few chapters to get the hang of the basic principles of parallell vhdl and processes.
If you want to do a fsm you use a process and a case statement. If you want to do a timer you'll need to create a counter (also a process). I myself program in VHDL by the way, if you're using verilog you can stop reading (: If you create a new vhdl file in quartus you can right click in the editor and "insert template" and select a template for a whole file or code for different blocks. //Ola
