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Steve-534B46
New Contributor
New ContributorAsynchronous FIFO and discontinuous write clock
Hello, The FPGA is a Cyclone 10LP (10CL016YU256I7G). The FIFO is configured as separate write and read clocks, it is 32 words deep. I have a design where the write clock is discontinuous. I have a...
Steve-534B46New Contributor
New ContributorAnd most importantly, where did the code 0x6C07 go?
