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Altera_Forum's avatar
Altera_Forum
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11 years ago

Arria V FPGA overcurrent

Dear All,

we have developed an electronic board using an ARRIA V 5AGXBB1D4F40C5 and we followed the requirements for the sequence of the power supplies.

we have an external 4-phase sequencer to send properly the different power supplies to the FPGA (we tested the power supplies and the sequencer separately with proper loads).

unfortunately, the FPGA is not working as we found out an over-current (more than 4A) on the 3.3V power supply which rises in phase 2 of the sequencer.

this 3.3V delivers power to the Vccio, Vccpmg and Vccpd pins of the FPGA, plus some other components on the board.

we found out that this over-current appends only if an other power supply is present on the FPGA : Vccp (1.1V, only delivered to the FPGA) which rises in phase 1 of the sequencer.

if we remove this last power supply, the over-current does not appear ... but obviously the FPGA does not work as this power supply is needed.

we have several hypothesis for this issue that we are currently testing but one of them is the board suffered at the beginning of the tests a negative voltage on the Vref pins of the FPGA (about -0.5V).

we fixed this mistake after having discovered the over-current issue, and now the voltage is positive on Vref.

then, do you think that a negative voltage of -0.5V on Vref could have destroyed the FPGA ?

and consecutively, do you think this could produce an over-current issue on one of these set of pins (Vccio, Vccpmg and Vccpd) ?

if not, do you see an other reason ?

thank you

best regards

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Do you have a second board to test that was never powered up with the VREF error? I've never used the Arria V so can't comment on that specifically. Just tossing out a general troubleshooting approach.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    --- Quote Start ---

    Do you have a second board to test that was never powered up with the VREF error? I've never used the Arria V so can't comment on that specifically. Just tossing out a general troubleshooting approach.

    --- Quote End ---

    hello rsefton,

    thank you for your message.

    we have a second board... but we are afraid to use it as we are not sure to understand the problem.

    we had to remove the FPGA of the 1st board to be able to see the right power supplies sequence...

    thus, we lost for sure the FPGA but maybe also this board in the removing process.

    but you're right, at the end, without any clue, we will power up the second one after fixing the Vref issue.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    then, nobody had experience of a negative voltage which has detroyed his FPGA ?

    (and which negative voltage on which pins ?)

    thanks again :-)
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi Kronic,

    The Vref absolute max rating is -0.5V, so you were right in the middle of a "no man's land", on the edge of permanent damage frontier...I would say, you have 50% chance your FPGA has survived.

    Was it a transient or a permanent voltage ?
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    --- Quote Start ---

    Hi Kronic,

    The Vref absolute max rating is -0.5V, so you were right in the middle of a "no man's land", on the edge of permanent damage frontier...I would say, you have 50% chance your FPGA has survived.

    Was it a transient or a permanent voltage ?

    --- Quote End ---

    Hi Genoli,

    thank you for your help.

    about the Vref voltage, unfortunately, we didn't find this absolute maximum rating in the documentation (in contrary to other voltages/pins)...

    if you have the reference document and the page where you found this information, I would be greatly interested. maybe we sought in the wrong documents...

    about your question, it was a permanent voltage (worst case I guess).

    in fact it was a part of the output voltage of an amplifier which goes to saturation (a design issue that we have to fix for future releases).
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Vref is located on a double function pin.

    It can be used as the reference voltage input if you use a voltage referenced I/O standard or as a user I/O (see A5 pin connection guide line).

    Therefore, the absolute max rating of VI DC input voltage apply (see A5 device handbook, Electrical Characteristics, VI DC input voltage Min: –0.50/ Max: 3.80 V).

    Nevertheless, in my previous HW design, I found Altera FPGAs rather robust wrt unfortunate manipulations (I/O short-circuit or overvoltage for instance) but ...this is just a feeling.

    It seems you have removed the FPGA on your 1st board, so you can check on the PCB pads of every FPGA power supply pins that the correct supply voltage is applied (it's a long way I know...) or at least perform an exhaustive check on the PCB gerber files.

    You said also "we lost for sure the FPGA but maybe also this board in the removing process."

    => A "latch-up" state is not necessarily destructive provided it does not last too long.

    More over,removing BGA packages and putting solder balls back is a current process you can subcontract at a reasonable cost (TB compared to the FPGA price of course ...)

    Anyway, once you are 100% sure of your FPGA power supply pins routing on the PCB and of your Vref, you can turn on the 2nd board with the current limitation of its external power supply activated and wo/ configuring the FPGA in order to have only the static power consumption. By monitoring the Icc and gradually increasing the power supply current limit up to the expected level, you will avoid any electrical destruction.