Arria-ii global clock input

Hi!!

I am using ARRIA-II FPGA EP2AGX125EF35I5N 1152 FBGA. I have interfaced DDR3 memory in Bank 7A. Thus this bank is assigned to VCCIO of 1.5V. This bank has GCLK

Pins 5P, 5N. I want to provide external clock input to this pins. Which IO standard should I use? I believe that in Arria II GX FPGA Development Board. they used LVDS standard for this clock inputs. Am I missing some information? Please let me know>