An all-in-one Software Defined Radio platform

Your FPGA selection needs to be based on your ADC selection. For example

1. Logic Interface; 3.3V LVCMOS, LVDS, or transceivers (JESD204)?

2. Interface clock frequency; what is the bus speed into the FPGA?

Cheers,

Dave

Great! - The ADC I am using is the AD9629-40 from Analog Devices. I believe the output drivers can be configured to interface with 1.8V to 3.3V CMOS logic families. I'll be sampling at 40MSps.

I'm very interested in purchasing a software development kit that can connect to my ADC. Can you please suggest Altera's low cost FPGAs and devlopment kits that would fit the AD9629-40?

Kind regards,

Les.

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The ADC I am using is the AD9629-40 from Analog Devices. I believe the output drivers can be configured to interface with 1.8V to 3.3V CMOS logic families. I'll be sampling at 40MSps.

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Yes, according to the data sheet, the output data can be operated at 3.3V logic levels. 40MHz is relatively slow, so any FPGA can be used. I'd recommend a Cyclone series device.

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I'm very interested in purchasing a software development kit that can connect to my ADC. Can you please suggest Altera's low cost FPGAs and devlopment kits that would fit the AD9629-40?

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Are you planning on creating a PCB or do you have the evaluation board?

http://wiki.analog.com/resources/eval/ad9266-80ebz_ad9649-80ebz_ad9629-80ebz_ad9609-80ebz

Cheers,

Dave

I appreciate your help - Yes, I have got the ADC evaluation board for the AD9629-40 as well as the High Speed Data Capture Kit (the exact set up from the link you sent). Do you know if it's possilbe to code the Virtex 4 on the High Speed Data Capture Kit for radio applications?

I am building the analog front end and the ADC onto a PCB as a prototype for product manufacturing. Initailly, my plan is to build the PCB and replace the ADC evaluation board, so it can connect to the High Speed Data Capture Kit for further evaluation using SPI controller and VisualAnalog. Then replace the High Speed Data Capture Kit with an FPGA board to develop my code in software. Does Altera have FPGA boards that can connect to the AD9629-40 ADC evaluation board ?

Thanks again,

Les.

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Yes, I have got the ADC evaluation board for the AD9629-40 as well as the High Speed Data Capture Kit (the exact set up from the link you sent). Do you know if it's possilbe to code the Virtex 4 on the High Speed Data Capture Kit for radio applications?

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Its your board, you can do anything you like. Since the board has a Virtex device on it, this is the wrong group to ask questions. You'll need to have a subscription edition of Xilinx's ISE tool to be able to create configurations for the FPGA.

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I am building the analog front end and the ADC onto a PCB as a prototype for product manufacturing. Initailly, my plan is to build the PCB and replace the ADC evaluation board, so it can connect to the High Speed Data Capture Kit for further evaluation using SPI controller and VisualAnalog. Then replace the High Speed Data Capture Kit with an FPGA board to develop my code in software. Does Altera have FPGA boards that can connect to the AD9629-40 ADC evaluation board ?

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Analog Devices have various adapter kits for their boards, start by looking on their site, or filing a service request there.

I'd recommend designing your board to use a standard interface, eg., HSMC if you want to use it only with Altera devices, or FMC if you want to be more general. Although given that the ADC data rate is only 40MHz, you could also just design it to work with the 100-mil expansion headers found on various Altera kits.

If you're designing the board for your own use, or for interfacing to your own various interface boards, then just select a connector that allows you to plug your boards together.

Once you've decided on what your final connector style will be, you can create an adapter board to interface to the Analog Devices evaluation board.

You could easily create an adapter board to interface that ADC kit to any of the Altera FPGA kits too.

Cheers,

Dave

Fantastic! - It looks like Analog devices have FMC adapter boards for their ADC evaluation boards such as,

http://www.analog.com/en/evaluation/eval-adc-fmc-int/eb.html

Do Altera's cyclone FPGA kits have the capability to use this FMC adapter board?

I do not have an FPGA kit yet. It may be best to select the FPGA board I need to develop the software. Then create an adapter board to interface the ADC to the particular Altera FPGA kit as you said.

Cheers,

Les.

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Do Altera's cyclone FPGA kits have the capability to use this FMC adapter board?

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This Arria V kit has an FMC connector

http://www.altera.com/products/devkits/altera/kit-arria-v-gx.html

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I do not have an FPGA kit yet. It may be best to select the FPGA board I need to develop the software. Then create an adapter board to interface the ADC to the particular Altera FPGA kit as you said.

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You need to be very careful to select a board that matches your data bandwidth requirements.

However, if you are trying to implement "software defined radio" why even bother with an FPGA. That would be a "hardware defined radio", albeit reprogrammable :)

Also selecting an ADC with a clock rate of 40MHz is not exactly going to get you much. Were you planning on interfacing it to a digital downconverter?

Here's a more reasonable looking SDR platform ...

http://www.kickstarter.com/projects/mossmann/hackrf-an-open-source-sdr-platform

Cheers,

Dave

That HankRF link is very interesting. However, this software defined radio is being constructed for maritime commercial applications, so it must meet maritime standards. The bandwidth of interest is 6MHz and the channel bandwidth is 25 kHz. Im oversampling by using 40MSps for process gain.Would this mean that the FPGA board must match the 6MHz bandwidth?

The 25 kHz channel will be digitally filtered and demodulated. I'm not sure at this stage whether to sample the channel down to baseband, or digitally convert down to base band.

I was hoping to use a low cost solution so I may need to use an HSMC or a 100-mil expansion headers if im to use something like the cyclone family. Do you have suggestions on FPGA boards I should be looking for?

Cheers,

Les.

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That HankRF link is very interesting.

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That project and GNU radio may have ideas you can borrow, even if you do not use their hardware.

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this software defined radio is being constructed for maritime commercial applications, so it must meet maritime standards. The bandwidth of interest is 6MHz and the channel bandwidth is 25 kHz. Im oversampling by using 40MSps for process gain.Would this mean that the FPGA board must match the 6MHz bandwidth?

The 25 kHz channel will be digitally filtered and demodulated. I'm not sure at this stage whether to sample the channel down to baseband, or digitally convert down to base band.

I was hoping to use a low cost solution so I may need to use an HSMC or a 100-mil expansion headers if im to use something like the cyclone family. Do you have suggestions on FPGA boards I should be looking for?

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While this is something that a 40MHz ADC plus an FPGA can do, its also something that devices from Lime Microsystems (the chip that hack RF uses), Analog Devices, Texas Instruments, and Linear Technology can implement directly. These devices have ADCs followed by mixers, decimation sinc filters, and FIR filters for sinc-filter correction.

For example, take a look at the AD6649 (I know this does not match your requirements - its just what I found after quickly looking on the Analog Devices site);

http://www.analog.com/en/analog-to-digital-converters/integrated-receivers/ad6649/products/product.html

If you're looking for low-cost, and "software" is processing the output samples, then that would seem to me to be the more appropriate device to use.

If you want to use an FPGA to do this, then you could use a low-cost board like the DE0-nano and interface that to a 40MHz ADC. In fact you do not even need to interface to an ADC to test DSP algorithms, since you can use RAM within the FPGA to store input and output samples, eg., see these class notes (with links to code)

http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-104paper_hawkins.pdf

http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-104slides_hawkins.pdf

Cheers,

Dave

Here's an example of a SDR kit that uses an FMC board plus a Xilinx Zynq kit. You implement a similar interface to the FMC board using an Arria V kit;

http://www.analog.com/en/evaluation/eval-fmcomms/eb.html

Cheers,

Dave