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Altera_Forum's avatar
Altera_Forum
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12 years ago

An all-in-one Software Defined Radio platform

Hi, I'm building the analog front end for my software defined radio receiver architecture. The ADC will directly sample the bandwidth of interest to basband where the the information can be pas...
Altera_Forum's avatar
Altera_Forum
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12 years ago

That HankRF link is very interesting. However, this software defined radio is being constructed for maritime commercial applications, so it must meet maritime standards. The bandwidth of interest is 6MHz and the channel bandwidth is 25 kHz. Im oversampling by using 40MSps for process gain.Would this mean that the FPGA board must match the 6MHz bandwidth?

The 25 kHz channel will be digitally filtered and demodulated. I'm not sure at this stage whether to sample the channel down to baseband, or digitally convert down to base band.

I was hoping to use a low cost solution so I may need to use an HSMC or a 100-mil expansion headers if im to use something like the cyclone family. Do you have suggestions on FPGA boards I should be looking for?

Cheers,

Les.