Hi, I know there are plenty of threads on this subject, I did read them but I am still confuse. I am using a Cyclone III EP3C10F256C8 FPGA and ECPS16. My intention is to upload the firmware image to an upper region (offset 0x80000 - 1/4th of the flash size) and boot from here, without copying the data to the 0x000000 offset. ---# 1 --- While reading the documentation(s) of the altremote_ug, I got headaches. the altremote_ug specifies page value (param 4) as the page number (0-15 for EPCS16). an521 specifies the value of this param as the address/4. Which would be the correct one? ---# 2 --- If for example I would copy the data from address 0x000.. (as written by the Quartus programmer) to another flash offset, the same image should be bootable from the new offset as well, right? ---# 3 --- how can I find out what problem the core had while trying to reconfigure? Thanks for the help!

1) Param 4 is the boot address (cannot find reference to addr/4 in AN521, see table 4). 2) The image will be bootable if moved from 0x0000 to your new boot address. Unless you have a Nios processor with software for the image. In that case you would have to modify the nios bootloader. (Its just changing an address) 3) You may read the altremote_update registers or perhaps use signaltap? Note that reading the registers of altremote_update for Cyclone III and IV is a bit confusing. The parameters are available at different read_source settings. See table 4 of AN521.

Hi, thanks for the reply. --- Quote Start --- 1) Param 4 is the boot address (cannot find reference to addr/4 in AN521, see table 4). --- Quote End --- "Address to be written to the ALTREMOTE_UPDATE megafunction is obtained by truncating 2 LSB bits from the word address of the start address. The example below shows truncating 2 LSB bits from 0x70000h which results in 0x1C000h. ". AN521, Figure 5 The altremote_update ug refers to this parameter as page number (0-15)... --- Quote Start --- 3) You may read the altremote_update registers or perhaps use signaltap? --- Quote End --- The problem is that once reconfiguration is started SignalTap cannot be used, because "the instance cannot be found". Does the altremote_update core also get reseted during reconfiguration? Can I read the precedent values once the new firmware(intended or factory) is loaded?

--- Quote Start --- Does the altremote_update core also get reseted during reconfiguration? Can I read the precedent values once the new firmware(intended or factory) is loaded? --- Quote End --- If I understand correctly, altremote_update core only preserves the following information across reconfiguration: - cause of reconfiguration - status of 2 previous application configurations (only CIII and Stratix III) - reconfiguration page address (other than CIII and Stratix III) On Cyclone III and Stratix III devices altremote_update core uses a boot address register in order to specify reconfiguration data location and you set it with the 'discard 2 lsb' procedure. All other devices use the page mode and you can only select pages 000 to 111 binary.

--- Quote Start --- If I understand correctly, altremote_update core only preserves the following information across reconfiguration: - cause of reconfiguration - status of 2 previous application configurations (only CIII and Stratix III) - reconfiguration page address (other than CIII and Stratix III) On Cyclone III and Stratix III devices altremote_update core uses a boot address register in order to specify reconfiguration data location and you set it with the 'discard 2 lsb' procedure. All other devices use the page mode and you can only select pages 000 to 111 binary. --- Quote End --- Great! That's I wanted to hear: * for my case it's boot address and not page select (Cyclone III). * I can read the precedent configuration information after succesful/failed reconfiguration. Thanks!

The altremote_update user guide is somewhat confusing because it mixes up features of different devices. You have to read it thoroughly in order to get the correct information. Moreover, the tricky method Altera devised to access registers, doesn't help. After you overcome these difficulties, the core works greatly.

altremote_update - application image mode | Altera Community

15 Replies

Altera_Forum
Honored Contributor
14 years ago
moved to a new thread (http://www.alteraforum.com/forum/showthread.php?p=143888#post143888)
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
Did you try with 0x20000? This is the way I do it in my Cyclone IV project and that seem to work. I thought all addresses was byte addressing.
--- Quote End ---

A billion thanks! It works! (previously when I tried and replied I did something wrong).

I start getting non-technical skepticism when using Altera after such negative experiences with conflicting userguides/application notes...

The AN521 clearly says it should be the word addressing without the last 2 lsbs :mad::confused:

... from now on every time I have an error I will tend to first blame Altera :-P

Thanks again!
Altera_Forum
Honored Contributor
14 years ago
No, after starting up in Factory image after power-up, it is sufficient to write the boot address for the Application image in parameter 4, write 0 to parameter 3 (disables watchdog) and set the reconfig pin of altremote_update high.
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
Did you try with 0x20000? This is the way I do it in my Cyclone IV project and that seem to work. I thought all addresses was byte addressing.
--- Quote End ---

Nope, not working.

Do I need to make use of the watchdog? Can I have just the simple statemachine I described above?
Altera_Forum
Honored Contributor
14 years ago
Did you try with 0x20000? This is the way I do it in my Cyclone IV project and that seem to work. I thought all addresses was byte addressing.
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
Perhaps you should write 0x20000 ? (You must downshift the value two bits when writing this register)
--- Quote End ---

Not to my understanding. 0x80000 is a byte addressing and the 2 lsb downshift applies to word adderssing. So I have to downshift 3 bits.

In AN521 there is an example at page Figure 27 which confirms what I did (see the quote below - from AN521).

--- Quote Start ---

After the busy_node is low, the factory image user logic sets param_node = 3'b100, write_param = 1'b1, and data_in_node = 22'b034000. This sets the upper 22 bits of the 24 bits of the application boot address. The remote system upgrade circuitry appends 2'b00 to the upper 22 bits, which results in the 24'hD0000 word address to be equivalent to the 24'h1A0000 byte address for the application image 2.

--- Quote End ---
Altera_Forum
Honored Contributor
14 years ago
Perhaps you should write 0x20000 ? (You must downshift the value two bits when writing this register)
Altera_Forum
Honored Contributor
14 years ago
Hi guys,

I'm having a hard time using this core. I'm not the guy that asks before reading documentation, I've read the AN521 and the _ug "several" times, but my application still doesn't work.

This is what I did:
I generated a dual-boot pof file, as shown here (http://img714.imageshack.us/img714/6246/dualboot.png) and programmed in into hardware.

I intend to boot with 2nd application image (offset 0x080000). I write param 4 as follows:
read_source = 0x00
param = 4
data_in = 0x10000

To check if writing was succesful, I read back param 4:
read_source = 0x11
param = 4
data_out = 0x10000

I wait ~ 5 seconds and trigger reconfiguration (set reconfig to 1, no reset of reconfig to 0) - I need a delay so SignalTap has time to fetch the aquired samples.

The FPGA reconfigures again using address 0x000000.

Can someone figure out what I do wrong? Or what I don't do?
Are the watchdog settings compulsory?

Thanks guys for the help so far!
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
You probably mean CIII and CIV ? (not Stratix III)
--- Quote End ---

I think you are right. I was sure for CIII; not so for Stratix.
Sorry for the mistake: I remember there was something else regarding CIII and Stratix III which was not supported in other devices.
Altera_Forum
Honored Contributor
14 years ago
--- Quote Start ---
If I understand correctly, altremote_update core only preserves the following information across reconfiguration:
- cause of reconfiguration
- status of 2 previous application configurations (only CIII and Stratix III)
- reconfiguration page address (other than CIII and Stratix III)

On Cyclone III and Stratix III devices altremote_update core uses a boot address register in order to specify reconfiguration data location and you set it with the 'discard 2 lsb' procedure.
All other devices use the page mode and you can only select pages 000 to 111 binary.
--- Quote End ---

You probably mean CIII and CIV ? (not Stratix III)
Also note that using the registers with previous configuration states is a bit confusing. The boot address of the current image is for example read in the Previous State Register 2 (read_source=10b, param=100b)

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altremote_update - application image mode

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