Thanks for the explanation. I believe the OPN mismatch is the root cause. Do you have an example design for the DK-DEV-AGI027RES, or know which Quartus version includes one? Our available versions (23.3–25.1) do not include a design example for this board. I’ve attached the QSF and TCL files we are currently using for reference.
# (C) 2001-2024 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions and other
# software and tools, and its AMPP partner logic functions, and any output
# files from any of the foregoing (including device programming or simulation
# files), and any associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License Subscription
# Agreement, Intel FPGA IP License Agreement, or other applicable
# license agreement, including, without limitation, that your use is for the
# sole purpose of programming logic devices manufactured by Intel and sold by
# Intel or its authorized distributors. Please refer to the applicable
# agreement for further details.
set_global_assignment -name TOP_LEVEL_ENTITY cxltyp3_memexp_ddr4_top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 23.3.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "02:50:54 JUNE 02, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "24.3.0 Pro Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name FAMILY "Agilex 7"
set_global_assignment -name DEVICE AGIB027R29A1E2VR3
set_global_assignment -name FLOW_DISABLE_ASSEMBLER OFF
set_global_assignment -name NUM_PARALLEL_PROCESSORS 16
set_global_assignment -name GENERATE_COMPRESSED_SOF ON
set_global_assignment -name VID_OPERATION_MODE "PMBUS MASTER"
set_global_assignment -name PWRMGT_BUS_SPEED_MODE "100 KHZ"
set_global_assignment -name USE_CONF_DONE SDM_IO16
set_global_assignment -name USE_PWRMGT_SCL SDM_IO0
set_global_assignment -name USE_PWRMGT_SDA SDM_IO12
set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "LINEAR FORMAT"
set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE OTHER
set_global_assignment -name PWRMGT_LINEAR_FORMAT_N "-13"
set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 47
set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00
set_global_assignment -name PWRMGT_DIRECT_FORMAT_COEFFICIENT_M 1
set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS
set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE OFF
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "AVST X8"
set_global_assignment -name MINIMUM_SEU_INTERVAL 10000
set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_115MHZ_IOSC
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
source ./constraints/cxltyp3ddr_quartus_constraints_ed_en.tcl
source ./constraints/qsf_device_pinout.tcl
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_compliance/cxl_compliance_csr_avmm_slave.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_compliance/cxl_compliance_csr_top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_pio_parameters.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_avalon_sc_fifo_1931_vhmcgqy.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_avalon_st_pipeline_stage_1920_zterisq.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_burst_adapter_1922_tsepz7q.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_burst_adapter_altera_avalon_st_pipeline_stage_1922_pev47ty.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_demultiplexer_1921_s5kn7vi.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_master_agent_191_mpbm6tq.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_master_translator_191_g7h47bq.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_multiplexer_1921_5zcdh2i.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_multiplexer_1921_zxmqgaq.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_router_1921_6kkcoeq.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_router_1921_sv2vwxi.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_slave_agent_191_ncfkfri.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_merlin_slave_translator_191_x56fcki.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_altera_mm_interconnect_1920_sx2feoa.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_MEM0.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_MEM0_altera_avalon_onchip_memory2_1932_vi4l4uq.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_reset_sync.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_std_synchronizer_nocut.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_avmm_intf.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_avst_intf.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_cpl.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_fifos.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_rw.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_sch_intf.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_pio.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_aer.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_bam_v2_crdt_intf.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_default_config.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_pf_checker.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_pcie_bam_v2_hwtcl.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed_pio0.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/pcie_ed.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_pio_ed_top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cxl_pio/intel_cxl_tx_crdt_intf.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_ecc_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_channel_adapter.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_cxlmem_ready_control.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_rmw_shim.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_ecc.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_emif.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_devmem_top.sv
set_global_assignment -name IP_FILE ./common/cdc_fifos/fifo_8b_256w_show_ahead.ip
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/axi2avmm_bridge.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/mc_top/mc_top.sv
set_global_assignment -name IP_FILE ./common/cdc_fifos/cfg_to_iosf_fifo_vcd_ED.ip
set_global_assignment -name IP_FILE ./common/cdc_fifos/iosf_to_cfg_fifo_vcd_ED.ip
set_global_assignment -name SYSTEMVERILOG_FILE ./common/afu/afu_top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/afu/afu_csr_avmm_slave.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/ex_default_csr/ex_default_csr_avmm_slave.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/ex_default_csr/ex_default_csr_top.sv
set_global_assignment -name IP_FILE ./common/mc_top/altecc_enc_dec_ip/altecc_enc_latency0.ip
set_global_assignment -name IP_FILE ./common/mc_top/altecc_enc_dec_ip/altecc_dec_latency1.ip
set_global_assignment -name IP_FILE ./common/mc_top/altecc_enc_dec_ip/altecc_dec_latency2.ip
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_pld_if.svh.iv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_fifo_vcd.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_dcfifo_pipe_vcd.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_scfifo_pipe_vcd.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_data_fifos_pipe.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_core_fifos.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_crd_check.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_crd_lmt.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_crd_type.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_data_fifos.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_rx_hdr_data_fifos.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/avst4to1_ss_tlp_hdr_decode.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/cxl_ed_avst_4to1_rx_side.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/avst4to1_rx/ed_define.svh.iv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr0_reg_macros.vh.iv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_reg_macros.vh.iv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_globals.vh.iv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cust_afu/cust_afu_wrapper.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/tmp_cafu_csr0_cfg_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr0_cfg_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr0_cfg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_mem_target_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_alg1a_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_ram_1r1w.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_ram_1r1w_be.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_cdc_fifo_vcd.v
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/fifo_sync_1.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/pattern_expand_by_byte_mask.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/pattern_expand_by_byte_mask_ver2.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/pattern_reduce_by_pattern_size.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/verify_sc_compare.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/verify_sc_extract_error_pattern.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/verify_sc_index_byte_offset.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_calc_error_address.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_execute_write_axi_fsm.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_execute_write.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_execute_response_count.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_verify_sc_read_axi_fsm.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_verify_sc_read.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_verify_sc_response.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_top_level_fsm_sc_only.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/alg_1a_top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_afu_status_regs.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_config_and_cxl_errors_reg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_config_check.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_debug_logs.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_error_injection_regs.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_poison_injection.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_top_level_fsm.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/mwae_top.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr_doe.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_mem_target.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/csr0_mc_status_glue.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_devreg_mailbox_elog.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_devreg_mailbox.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_reg_router.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_csr_avmm_slave.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/ccv_afu_cdc_fifo.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr0_wrapper.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/cafu_csr0/cafu_csr0_avmm_wrapper.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/axi_to_avst/axi_avst_if_pkg.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/axi_to_avst/axi_to_avst_bridge.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/axi_to_avst/intel_cxl_afu_cache_io_demux.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/axi_to_avst/intel_cxl_afu_pio_mux.sv
set_global_assignment -name SYSTEMVERILOG_FILE ./common/axi_to_avst/intel_cxl_tx_tlp_fifos.sv
set_global_assignment -name IP_FILE ./common/mc_top/emif_ip/emif_cal_two_ch.ip
set_global_assignment -name IP_FILE ./common/mc_top/emif_ip/emif.ip
set_global_assignment -name IP_FILE ./common/mc_top/sip_quartus_ips/rspfifo_IP/rspfifo.ip
set_global_assignment -name IP_FILE ./common/mc_top/sip_quartus_ips/reqfifo_IP/reqfifo.ip
set_global_assignment -name SEARCH_PATH ./common
set_global_assignment -name SEARCH_PATH ./../intel_rtile_cxl_top_cxltyp3_ed/intel_rtile_cxl_top_1140/synth
set_global_assignment -name SEARCH_PATH ./common/avst4to1_rx/
set_global_assignment -name SEARCH_PATH ./common/cafu_csr0/
set_global_assignment -name SEARCH_PATH ./common/axi_to_avst/
set_global_assignment -name QSYS_FILE ./../intel_rtile_cxl_top_cxltyp3_ed.ip
set_global_assignment -name SYSTEMVERILOG_FILE ed_top_wrapper_typ3.sv
set_global_assignment -name QSYS_FILE common/intel_reset_release/intel_reset_release.ip
set_global_assignment -name SYSTEMVERILOG_FILE cxltyp3_memexp_ddr4_top.sv
set_global_assignment -name SDC_FILE ./constraints/cxl_memexp_top.sdc
set_instance_assignment -name VIRTUAL_PIN ON -to phy_sys_ial_* -entity cxltyp3_memexp_ddr4_top
set_instance_assignment -name VIRTUAL_PIN ON -to o_phy_* -entity cxltyp3_memexp_ddr4_top
set_instance_assignment -name VIRTUAL_PIN ON -to i_phy_* -entity cxltyp3_memexp_ddr4_top
# (C) 2001-2024 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions and other
# software and tools, and its AMPP partner logic functions, and any output
# files from any of the foregoing (including device programming or simulation
# files), and any associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License Subscription
# Agreement, Intel FPGA IP License Agreement, or other applicable
# license agreement, including, without limitation, that your use is for the
# sole purpose of programming logic devices manufactured by Intel and sold by
# Intel or its authorized distributors. Please refer to the applicable
# agreement for further details.
## Used for Example design on Devkit RNR-B0##
## Used for Example design on Devkit RNR-A0##
# reset interface for U22 / BANK 15C
set_location_assignment PIN_CY30 -to resetn
set_instance_assignment -name IO_STANDARD "1.0 V" -to resetn
# fabric PLL 1 refclk
#set_location_assignment PIN_LR13 -to refclk4
#set_location_assignment PIN_KU36 -to refclk4
set_location_assignment PIN_AN61 -to refclk4
set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to refclk4
# refclk interface for U22 /BANK 15C
set_location_assignment PIN_EG27 -to refclk0
set_instance_assignment -name IO_STANDARD "HCSL" -to refclk0
set_location_assignment PIN_FC27 -to refclk1
set_instance_assignment -name IO_STANDARD "HCSL" -to refclk1
# CXT TX Pin assignments for U22 / BANK 15C
set_location_assignment PIN_AH22 -to cxl_tx_n[0]
set_location_assignment PIN_AU16 -to cxl_tx_n[1]
set_location_assignment PIN_BA22 -to cxl_tx_n[2]
set_location_assignment PIN_BK16 -to cxl_tx_n[3]
set_location_assignment PIN_BN22 -to cxl_tx_n[4]
set_location_assignment PIN_CB16 -to cxl_tx_n[5]
set_location_assignment PIN_CE22 -to cxl_tx_n[6]
set_location_assignment PIN_CP16 -to cxl_tx_n[7]
set_location_assignment PIN_CV22 -to cxl_tx_n[8]
set_location_assignment PIN_DG16 -to cxl_tx_n[9]
set_location_assignment PIN_DK22 -to cxl_tx_n[10]
set_location_assignment PIN_DW16 -to cxl_tx_n[11]
set_location_assignment PIN_EB22 -to cxl_tx_n[12]
set_location_assignment PIN_EM16 -to cxl_tx_n[13]
set_location_assignment PIN_ER22 -to cxl_tx_n[14]
set_location_assignment PIN_FD16 -to cxl_tx_n[15]
set_location_assignment PIN_AL20 -to cxl_tx_p[0]
set_location_assignment PIN_AP14 -to cxl_tx_p[1]
set_location_assignment PIN_BD20 -to cxl_tx_p[2]
set_location_assignment PIN_BG14 -to cxl_tx_p[3]
set_location_assignment PIN_BT20 -to cxl_tx_p[4]
set_location_assignment PIN_BW14 -to cxl_tx_p[5]
set_location_assignment PIN_CH20 -to cxl_tx_p[6]
set_location_assignment PIN_CL14 -to cxl_tx_p[7]
set_location_assignment PIN_DA20 -to cxl_tx_p[8]
set_location_assignment PIN_DD14 -to cxl_tx_p[9]
set_location_assignment PIN_DN20 -to cxl_tx_p[10]
set_location_assignment PIN_DT14 -to cxl_tx_p[11]
set_location_assignment PIN_EE20 -to cxl_tx_p[12]
set_location_assignment PIN_EH14 -to cxl_tx_p[13]
set_location_assignment PIN_EV20 -to cxl_tx_p[14]
set_location_assignment PIN_FA14 -to cxl_tx_p[15]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to cxl_tx_n[*]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to cxl_tx_p[*]
# CXT RX Pin assignments for U22 / BANK 15C
set_location_assignment PIN_AH10 -to cxl_rx_n[0]
set_location_assignment PIN_AU3 -to cxl_rx_n[1]
set_location_assignment PIN_BA10 -to cxl_rx_n[2]
set_location_assignment PIN_BK3 -to cxl_rx_n[3]
set_location_assignment PIN_BN10 -to cxl_rx_n[4]
set_location_assignment PIN_CB3 -to cxl_rx_n[5]
set_location_assignment PIN_CE10 -to cxl_rx_n[6]
set_location_assignment PIN_CP3 -to cxl_rx_n[7]
set_location_assignment PIN_CV10 -to cxl_rx_n[8]
set_location_assignment PIN_DG3 -to cxl_rx_n[9]
set_location_assignment PIN_DK10 -to cxl_rx_n[10]
set_location_assignment PIN_DW3 -to cxl_rx_n[11]
set_location_assignment PIN_EB10 -to cxl_rx_n[12]
set_location_assignment PIN_EM3 -to cxl_rx_n[13]
set_location_assignment PIN_ER10 -to cxl_rx_n[14]
set_location_assignment PIN_FD3 -to cxl_rx_n[15]
set_location_assignment PIN_AL8 -to cxl_rx_p[0]
set_location_assignment PIN_AP1 -to cxl_rx_p[1]
set_location_assignment PIN_BD8 -to cxl_rx_p[2]
set_location_assignment PIN_BG1 -to cxl_rx_p[3]
set_location_assignment PIN_BT8 -to cxl_rx_p[4]
set_location_assignment PIN_BW1 -to cxl_rx_p[5]
set_location_assignment PIN_CH8 -to cxl_rx_p[6]
set_location_assignment PIN_CL1 -to cxl_rx_p[7]
set_location_assignment PIN_DA8 -to cxl_rx_p[8]
set_location_assignment PIN_DD1 -to cxl_rx_p[9]
set_location_assignment PIN_DN8 -to cxl_rx_p[10]
set_location_assignment PIN_DT1 -to cxl_rx_p[11]
set_location_assignment PIN_EE8 -to cxl_rx_p[12]
set_location_assignment PIN_EH1 -to cxl_rx_p[13]
set_location_assignment PIN_EV8 -to cxl_rx_p[14]
set_location_assignment PIN_FA1 -to cxl_rx_p[15]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to cxl_rx_n[*]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to cxl_rx_p[*]
set_location_assignment PIN_MA44 -to mem_refclk[0]
set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to mem_refclk[0] -entity ddr4
set_location_assignment PIN_LH48 -to mem_ck[0][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to mem_ck[0][0]
set_location_assignment PIN_LL49 -to mem_ck_n[0][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to mem_ck_n[0][0]
set_location_assignment PIN_LH44 -to mem_bg[0][1]
set_location_assignment PIN_LR47 -to mem_bg[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_bg[0][*]
set_location_assignment PIN_LN48 -to mem_ba[0][1]
set_location_assignment PIN_LW47 -to mem_ba[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_ba[0][*]
set_location_assignment PIN_MA48 -to mem_alert_n[0]
set_location_assignment PIN_LN44 -to mem_oct_rzqin[0]
set_location_assignment PIN_LB48 -to mem_par[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_par[0]
set_location_assignment PIN_LB46 -to mem_cke[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_cke[0][0]
set_location_assignment PIN_LH46 -to mem_odt[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_odt[0][0]
set_location_assignment PIN_KW45 -to mem_act_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_act_n[0]
set_location_assignment PIN_LB44 -to mem_cs_n[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_cs_n[0][0]
set_location_assignment PIN_LL45 -to mem_reset_n[0]
set_location_assignment PIN_LN46 -to mem_a[0][16]
set_location_assignment PIN_LR45 -to mem_a[0][15]
set_location_assignment PIN_MA46 -to mem_a[0][14]
set_location_assignment PIN_LW45 -to mem_a[0][13]
set_location_assignment PIN_LR43 -to mem_a[0][12]
set_location_assignment PIN_KJ49 -to mem_a[0][11]
set_location_assignment PIN_KF48 -to mem_a[0][10]
set_location_assignment PIN_KU48 -to mem_a[0][9]
set_location_assignment PIN_KR49 -to mem_a[0][8]
set_location_assignment PIN_KJ47 -to mem_a[0][7]
set_location_assignment PIN_KF46 -to mem_a[0][6]
set_location_assignment PIN_KR47 -to mem_a[0][5]
set_location_assignment PIN_KU46 -to mem_a[0][4]
set_location_assignment PIN_KF44 -to mem_a[0][3]
set_location_assignment PIN_KJ45 -to mem_a[0][2]
set_location_assignment PIN_KU44 -to mem_a[0][1]
set_location_assignment PIN_KR45 -to mem_a[0][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_a[0][*]
set_location_assignment PIN_LN60 -to mem_dq[0][71]
set_location_assignment PIN_LR55 -to mem_dq[0][70]
set_location_assignment PIN_LR59 -to mem_dq[0][69]
set_location_assignment PIN_LW55 -to mem_dq[0][68]
set_location_assignment PIN_MA60 -to mem_dq[0][67]
set_location_assignment PIN_LN56 -to mem_dq[0][66]
set_location_assignment PIN_LW59 -to mem_dq[0][65]
set_location_assignment PIN_MA56 -to mem_dq[0][64]
set_location_assignment PIN_MC57 -to mem_dq[0][63]
set_location_assignment PIN_MD52 -to mem_dq[0][62]
set_location_assignment PIN_MK57 -to mem_dq[0][61]
set_location_assignment PIN_MH52 -to mem_dq[0][60]
set_location_assignment PIN_MH56 -to mem_dq[0][59]
set_location_assignment PIN_MC53 -to mem_dq[0][58]
set_location_assignment PIN_MD56 -to mem_dq[0][57]
set_location_assignment PIN_MK53 -to mem_dq[0][56]
set_location_assignment PIN_MC63 -to mem_dq[0][55]
set_location_assignment PIN_MD58 -to mem_dq[0][54]
set_location_assignment PIN_MK63 -to mem_dq[0][53]
set_location_assignment PIN_MH58 -to mem_dq[0][52]
set_location_assignment PIN_MD62 -to mem_dq[0][51]
set_location_assignment PIN_MK59 -to mem_dq[0][50]
set_location_assignment PIN_MH62 -to mem_dq[0][49]
set_location_assignment PIN_MC59 -to mem_dq[0][48]
set_location_assignment PIN_KW55 -to mem_dq[0][47]
set_location_assignment PIN_LB50 -to mem_dq[0][46]
set_location_assignment PIN_LB54 -to mem_dq[0][45]
set_location_assignment PIN_LH50 -to mem_dq[0][44]
set_location_assignment PIN_LH54 -to mem_dq[0][43]
set_location_assignment PIN_KW51 -to mem_dq[0][42]
set_location_assignment PIN_LL55 -to mem_dq[0][41]
set_location_assignment PIN_LL51 -to mem_dq[0][40]
set_location_assignment PIN_LN54 -to mem_dq[0][39]
set_location_assignment PIN_LR49 -to mem_dq[0][38]
set_location_assignment PIN_LR53 -to mem_dq[0][37]
set_location_assignment PIN_LN50 -to mem_dq[0][36]
set_location_assignment PIN_MA54 -to mem_dq[0][35]
set_location_assignment PIN_MA50 -to mem_dq[0][34]
set_location_assignment PIN_LW53 -to mem_dq[0][33]
set_location_assignment PIN_LW49 -to mem_dq[0][32]
set_location_assignment PIN_MC45 -to mem_dq[0][31]
set_location_assignment PIN_MD40 -to mem_dq[0][30]
set_location_assignment PIN_MK45 -to mem_dq[0][29]
set_location_assignment PIN_MH40 -to mem_dq[0][28]
set_location_assignment PIN_MH44 -to mem_dq[0][27]
set_location_assignment PIN_MC41 -to mem_dq[0][26]
set_location_assignment PIN_MD44 -to mem_dq[0][25]
set_location_assignment PIN_MK41 -to mem_dq[0][24]
set_location_assignment PIN_MC51 -to mem_dq[0][23]
set_location_assignment PIN_MD46 -to mem_dq[0][22]
set_location_assignment PIN_MK51 -to mem_dq[0][21]
set_location_assignment PIN_MH46 -to mem_dq[0][20]
set_location_assignment PIN_MD50 -to mem_dq[0][19]
set_location_assignment PIN_MK47 -to mem_dq[0][18]
set_location_assignment PIN_MH50 -to mem_dq[0][17]
set_location_assignment PIN_MC47 -to mem_dq[0][16]
set_location_assignment PIN_LN42 -to mem_dq[0][15]
set_location_assignment PIN_LR37 -to mem_dq[0][14]
set_location_assignment PIN_LR41 -to mem_dq[0][13]
set_location_assignment PIN_LW37 -to mem_dq[0][12]
set_location_assignment PIN_LW41 -to mem_dq[0][11]
set_location_assignment PIN_LN38 -to mem_dq[0][10]
set_location_assignment PIN_MA42 -to mem_dq[0][9]
set_location_assignment PIN_MA38 -to mem_dq[0][8]
set_location_assignment PIN_MC39 -to mem_dq[0][7]
set_location_assignment PIN_MD34 -to mem_dq[0][6]
set_location_assignment PIN_MK39 -to mem_dq[0][5]
set_location_assignment PIN_MH34 -to mem_dq[0][4]
set_location_assignment PIN_MD38 -to mem_dq[0][3]
set_location_assignment PIN_MK35 -to mem_dq[0][2]
set_location_assignment PIN_MH38 -to mem_dq[0][1]
set_location_assignment PIN_MC35 -to mem_dq[0][0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to mem_dq[0][*]
set_location_assignment PIN_LW57 -to mem_dqs[0][8]
set_location_assignment PIN_MH54 -to mem_dqs[0][7]
set_location_assignment PIN_MH60 -to mem_dqs[0][6]
set_location_assignment PIN_LH52 -to mem_dqs[0][5]
set_location_assignment PIN_LW51 -to mem_dqs[0][4]
set_location_assignment PIN_MH42 -to mem_dqs[0][3]
set_location_assignment PIN_MH48 -to mem_dqs[0][2]
set_location_assignment PIN_LW39 -to mem_dqs[0][1]
set_location_assignment PIN_MH36 -to mem_dqs[0][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to mem_dqs[0][*]
set_location_assignment PIN_MA58 -to mem_dqs_n[0][8]
set_location_assignment PIN_MK55 -to mem_dqs_n[0][7]
set_location_assignment PIN_MK61 -to mem_dqs_n[0][6]
set_location_assignment PIN_LL53 -to mem_dqs_n[0][5]
set_location_assignment PIN_MA52 -to mem_dqs_n[0][4]
set_location_assignment PIN_MK43 -to mem_dqs_n[0][3]
set_location_assignment PIN_MK49 -to mem_dqs_n[0][2]
set_location_assignment PIN_MA40 -to mem_dqs_n[0][1]
set_location_assignment PIN_MK37 -to mem_dqs_n[0][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to mem_dqs_n[0][*]
set_location_assignment PIN_LR57 -to mem_dbi_n[0][8]
set_location_assignment PIN_MD54 -to mem_dbi_n[0][7]
set_location_assignment PIN_MD60 -to mem_dbi_n[0][6]
set_location_assignment PIN_LB52 -to mem_dbi_n[0][5]
set_location_assignment PIN_LR51 -to mem_dbi_n[0][4]
set_location_assignment PIN_MD42 -to mem_dbi_n[0][3]
set_location_assignment PIN_MD48 -to mem_dbi_n[0][2]
set_location_assignment PIN_LR39 -to mem_dbi_n[0][1]
set_location_assignment PIN_MD36 -to mem_dbi_n[0][0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to mem_dbi_n[0][*]
#-------DDR4 COMP CH1 PIN ASSIGNMENT--------#
set_location_assignment PIN_KU36 -to mem_refclk[1]
set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to mem_refclk[1] -entity ddr4
set_location_assignment PIN_KR39 -to mem_ck[1][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to mem_ck[1][0]
set_location_assignment PIN_KU38 -to mem_ck_n[1][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V SSTL" -to mem_ck_n[1][0]
set_location_assignment PIN_KR43 -to mem_bg[1][1]
set_location_assignment PIN_KF32 -to mem_bg[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_bg[1][*]
set_location_assignment PIN_KJ33 -to mem_ba[1][1]
set_location_assignment PIN_KR33 -to mem_ba[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_ba[1][*]
set_location_assignment PIN_KU32 -to mem_alert_n[1]
set_location_assignment PIN_KJ37 -to mem_oct_rzqin[1]
set_location_assignment PIN_KJ39 -to mem_par[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_par[1]
set_location_assignment PIN_KF40 -to mem_cke[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_cke[1][0]
set_location_assignment PIN_KU40 -to mem_odt[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_odt[1][0]
set_location_assignment PIN_KJ43 -to mem_act_n[1]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_act_n[1]
set_location_assignment PIN_KF42 -to mem_cs_n[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_cs_n[1][0]
set_location_assignment PIN_KU42 -to mem_reset_n[1]
set_location_assignment PIN_KJ35 -to mem_a[1][16]
set_location_assignment PIN_KF34 -to mem_a[1][15]
set_location_assignment PIN_KR35 -to mem_a[1][14]
set_location_assignment PIN_KU34 -to mem_a[1][13]
set_location_assignment PIN_KF36 -to mem_a[1][12]
set_location_assignment PIN_LB38 -to mem_a[1][11]
set_location_assignment PIN_KW39 -to mem_a[1][10]
set_location_assignment PIN_LL39 -to mem_a[1][9]
set_location_assignment PIN_LH38 -to mem_a[1][8]
set_location_assignment PIN_KW41 -to mem_a[1][7]
set_location_assignment PIN_LB40 -to mem_a[1][6]
set_location_assignment PIN_LL41 -to mem_a[1][5]
set_location_assignment PIN_LH40 -to mem_a[1][4]
set_location_assignment PIN_LB42 -to mem_a[1][3]
set_location_assignment PIN_KW43 -to mem_a[1][2]
set_location_assignment PIN_LL43 -to mem_a[1][1]
set_location_assignment PIN_LH42 -to mem_a[1][0]
set_instance_assignment -name IO_STANDARD "SSTL-12" -to mem_a[1][*]
set_location_assignment PIN_LU4 -to mem_dq[1][71]
set_location_assignment PIN_LN11 -to mem_dq[1][70]
set_location_assignment PIN_MC5 -to mem_dq[1][69]
set_location_assignment PIN_MA11 -to mem_dq[1][68]
set_location_assignment PIN_LW2 -to mem_dq[1][67]
set_location_assignment PIN_LW9 -to mem_dq[1][66]
set_location_assignment PIN_MA4 -to mem_dq[1][65]
set_location_assignment PIN_LR9 -to mem_dq[1][64]
set_location_assignment PIN_LN23 -to mem_dq[1][63]
set_location_assignment PIN_MA15 -to mem_dq[1][62]
set_location_assignment PIN_MA23 -to mem_dq[1][61]
set_location_assignment PIN_LN15 -to mem_dq[1][60]
set_location_assignment PIN_LR21 -to mem_dq[1][59]
set_location_assignment PIN_LW13 -to mem_dq[1][58]
set_location_assignment PIN_LW21 -to mem_dq[1][57]
set_location_assignment PIN_LR13 -to mem_dq[1][56]
set_location_assignment PIN_MC17 -to mem_dq[1][55]
set_location_assignment PIN_MF5 -to mem_dq[1][54]
set_location_assignment PIN_MK17 -to mem_dq[1][53]
set_location_assignment PIN_MD7 -to mem_dq[1][52]
set_location_assignment PIN_MD15 -to mem_dq[1][51]
set_location_assignment PIN_MC9 -to mem_dq[1][50]
set_location_assignment PIN_MH15 -to mem_dq[1][49]
set_location_assignment PIN_MH7 -to mem_dq[1][48]
set_location_assignment PIN_MA30 -to mem_dq[1][47]
set_location_assignment PIN_MA26 -to mem_dq[1][46]
set_location_assignment PIN_LN30 -to mem_dq[1][45]
set_location_assignment PIN_LR25 -to mem_dq[1][44]
set_location_assignment PIN_LR29 -to mem_dq[1][43]
set_location_assignment PIN_LW25 -to mem_dq[1][42]
set_location_assignment PIN_LW29 -to mem_dq[1][41]
set_location_assignment PIN_LN26 -to mem_dq[1][40]
set_location_assignment PIN_JL37 -to mem_dq[1][39]
set_location_assignment PIN_JL33 -to mem_dq[1][38]
set_location_assignment PIN_JP36 -to mem_dq[1][37]
set_location_assignment PIN_JP32 -to mem_dq[1][36]
set_location_assignment PIN_KC37 -to mem_dq[1][35]
set_location_assignment PIN_KC33 -to mem_dq[1][34]
set_location_assignment PIN_JY36 -to mem_dq[1][33]
set_location_assignment PIN_JY32 -to mem_dq[1][32]
set_location_assignment PIN_LB36 -to mem_dq[1][31]
set_location_assignment PIN_KW37 -to mem_dq[1][30]
set_location_assignment PIN_LL37 -to mem_dq[1][29]
set_location_assignment PIN_LB32 -to mem_dq[1][28]
set_location_assignment PIN_LH36 -to mem_dq[1][27]
set_location_assignment PIN_LL33 -to mem_dq[1][26]
set_location_assignment PIN_KW33 -to mem_dq[1][25]
set_location_assignment PIN_LH32 -to mem_dq[1][24]
set_location_assignment PIN_MC27 -to mem_dq[1][23]
set_location_assignment PIN_MC21 -to mem_dq[1][22]
set_location_assignment PIN_MK27 -to mem_dq[1][21]
set_location_assignment PIN_MD19 -to mem_dq[1][20]
set_location_assignment PIN_MD26 -to mem_dq[1][19]
set_location_assignment PIN_MK21 -to mem_dq[1][18]
set_location_assignment PIN_MH26 -to mem_dq[1][17]
set_location_assignment PIN_MH19 -to mem_dq[1][16]
set_location_assignment PIN_MA36 -to mem_dq[1][15]
set_location_assignment PIN_MA32 -to mem_dq[1][14]
set_location_assignment PIN_LN36 -to mem_dq[1][13]
set_location_assignment PIN_LR31 -to mem_dq[1][12]
set_location_assignment PIN_LR35 -to mem_dq[1][11]
set_location_assignment PIN_LW31 -to mem_dq[1][10]
set_location_assignment PIN_LW35 -to mem_dq[1][9]
set_location_assignment PIN_LN32 -to mem_dq[1][8]
set_location_assignment PIN_MC33 -to mem_dq[1][7]
set_location_assignment PIN_MD28 -to mem_dq[1][6]
set_location_assignment PIN_MK33 -to mem_dq[1][5]
set_location_assignment PIN_MH28 -to mem_dq[1][4]
set_location_assignment PIN_MD32 -to mem_dq[1][3]
set_location_assignment PIN_MK29 -to mem_dq[1][2]
set_location_assignment PIN_MH32 -to mem_dq[1][1]
set_location_assignment PIN_MC29 -to mem_dq[1][0]
set_location_assignment PIN_LW5 -to mem_dqs[1][8]
set_location_assignment PIN_LW17 -to mem_dqs[1][7]
set_location_assignment PIN_MH11 -to mem_dqs[1][6]
set_location_assignment PIN_LW27 -to mem_dqs[1][5]
set_location_assignment PIN_JY34 -to mem_dqs[1][4]
set_location_assignment PIN_LH34 -to mem_dqs[1][3]
set_location_assignment PIN_MH23 -to mem_dqs[1][2]
set_location_assignment PIN_LW33 -to mem_dqs[1][1]
set_location_assignment PIN_MH30 -to mem_dqs[1][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to mem_dqs[1][*]
set_location_assignment PIN_MA7 -to mem_dqs_n[1][8]
set_location_assignment PIN_MA19 -to mem_dqs_n[1][7]
set_location_assignment PIN_MK13 -to mem_dqs_n[1][6]
set_location_assignment PIN_MA28 -to mem_dqs_n[1][5]
set_location_assignment PIN_KC35 -to mem_dqs_n[1][4]
set_location_assignment PIN_LL35 -to mem_dqs_n[1][3]
set_location_assignment PIN_MK25 -to mem_dqs_n[1][2]
set_location_assignment PIN_MA34 -to mem_dqs_n[1][1]
set_location_assignment PIN_MK31 -to mem_dqs_n[1][0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.2-V POD" -to mem_dqs_n[1][*]
set_location_assignment PIN_LR5 -to mem_dbi_n[1][8]
set_location_assignment PIN_LR17 -to mem_dbi_n[1][7]
set_location_assignment PIN_MD11 -to mem_dbi_n[1][6]
set_location_assignment PIN_LR27 -to mem_dbi_n[1][5]
set_location_assignment PIN_JP34 -to mem_dbi_n[1][4]
set_location_assignment PIN_LB34 -to mem_dbi_n[1][3]
set_location_assignment PIN_MD23 -to mem_dbi_n[1][2]
set_location_assignment PIN_LR33 -to mem_dbi_n[1][1]
set_location_assignment PIN_MD30 -to mem_dbi_n[1][0]
set_instance_assignment -name IO_STANDARD "1.2-V POD" -to mem_dbi_n[1][*]
New Contributor
